baddev.hh revision 1722
1802SN/A/* 21762SN/A * Copyright (c) 2004 The Regents of The University of Michigan 3802SN/A * All rights reserved. 4802SN/A * 5802SN/A * Redistribution and use in source and binary forms, with or without 6802SN/A * modification, are permitted provided that the following conditions are 7802SN/A * met: redistributions of source code must retain the above copyright 8802SN/A * notice, this list of conditions and the following disclaimer; 9802SN/A * redistributions in binary form must reproduce the above copyright 10802SN/A * notice, this list of conditions and the following disclaimer in the 11802SN/A * documentation and/or other materials provided with the distribution; 12802SN/A * neither the name of the copyright holders nor the names of its 13802SN/A * contributors may be used to endorse or promote products derived from 14802SN/A * this software without specific prior written permission. 15802SN/A * 16802SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17802SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18802SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19802SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20802SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21802SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22802SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23802SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24802SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25802SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26802SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu */ 282665Ssaidi@eecs.umich.edu 29802SN/A/** @file 30802SN/A * This devices just panics when touched. For example if you have a 311722SN/A * kernel that touches the frame buffer which isn't allowed. 32802SN/A */ 33802SN/A 34802SN/A#ifndef __DEV_BADDEV_HH__ 35802SN/A#define __DEV_BADDEV_HH__ 361310SN/A 371310SN/A#include "base/range.hh" 38802SN/A#include "dev/io_device.hh" 39909SN/A 404762Snate@binkert.org/** 412257SN/A * BadDevice 42802SN/A * This device just panics when accessed. It is supposed to warn 43802SN/A * the user that the kernel they are running has unsupported 44802SN/A * options (i.e. frame buffer) 45802SN/A */ 46802SN/Aclass BadDevice : public PioDevice 47802SN/A{ 482539SN/A private: 49802SN/A Addr addr; 50802SN/A static const Addr size = 0xf; 512539SN/A 52802SN/A std::string devname; 532539SN/A 544762Snate@binkert.org public: 554762Snate@binkert.org /** 564762Snate@binkert.org * Constructor for the Baddev Class. 574762Snate@binkert.org * @param name name of the object 584762Snate@binkert.org * @param a base address of the write 592539SN/A * @param mmu the memory controller 604762Snate@binkert.org * @param hier object to store parameters universal the device hierarchy 614762Snate@binkert.org * @param bus The bus that this device is attached to 62802SN/A * @param devicename device that is not implemented 63802SN/A */ 64885SN/A BadDevice(const std::string &name, Addr a, MemoryController *mmu, 65885SN/A HierParams *hier, Bus *bus, const std::string &devicename); 662539SN/A 67885SN/A /** 68885SN/A * On a read event we just panic aand hopefully print a 692539SN/A * meaningful error message. 70802SN/A * @param req Contains the address to read from. 713349Sbinkertn@umich.edu * @param data A pointer to write the read data to. 723349Sbinkertn@umich.edu * @return The fault condition of the access. 73802SN/A */ 74802SN/A virtual Fault read(MemReqPtr &req, uint8_t *data); 751310SN/A 76 /** 77 * On a write event we just panic aand hopefully print a 78 * meaningful error message. 79 * @param req Contains the address to write to. 80 * @param data The data to write. 81 * @return The fault condition of the access. 82 */ 83 virtual Fault write(MemReqPtr &req, const uint8_t *data); 84 85 /** 86 * Return how long this access will take. 87 * @param req the memory request to calcuate 88 * @return Tick when the request is done 89 */ 90 Tick cacheAccess(MemReqPtr &req); 91}; 92 93#endif // __DEV_BADDEV_HH__ 94