timer_cpulocal.hh revision 13106
1/* 2 * Copyright (c) 2010-2011,2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions are 16 * met: redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer; 18 * redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution; 21 * neither the name of the copyright holders nor the names of its 22 * contributors may be used to endorse or promote products derived from 23 * this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Authors: Ali Saidi 38 * Geoffrey Blake 39 */ 40 41#ifndef __DEV_ARM_LOCALTIMER_HH__ 42#define __DEV_ARM_LOCALTIMER_HH__ 43 44#include "base/bitunion.hh" 45#include "dev/io_device.hh" 46#include "params/CpuLocalTimer.hh" 47 48/** @file 49 * This implements the cpu local timer from the Cortex-A9 MPCore 50 * Technical Reference Manual rev r2p2 (ARM DDI 0407F) 51 */ 52 53class BaseGic; 54class ArmInterruptPin; 55 56class CpuLocalTimer : public BasicPioDevice 57{ 58 protected: 59 class Timer : public Serializable 60 { 61 62 public: 63 enum { 64 TimerLoadReg = 0x00, 65 TimerCounterReg = 0x04, 66 TimerControlReg = 0x08, 67 TimerIntStatusReg = 0x0C, 68 WatchdogLoadReg = 0x20, 69 WatchdogCounterReg = 0x24, 70 WatchdogControlReg = 0x28, 71 WatchdogIntStatusReg = 0x2C, 72 WatchdogResetStatusReg = 0x30, 73 WatchdogDisableReg = 0x34, 74 Size = 0x38 75 }; 76 77 BitUnion32(TimerCtrl) 78 Bitfield<0> enable; 79 Bitfield<1> autoReload; 80 Bitfield<2> intEnable; 81 Bitfield<7,3> reserved; 82 Bitfield<15,8> prescalar; 83 EndBitUnion(TimerCtrl) 84 85 BitUnion32(WatchdogCtrl) 86 Bitfield<0> enable; 87 Bitfield<1> autoReload; 88 Bitfield<2> intEnable; 89 Bitfield<3> watchdogMode; 90 Bitfield<7,4> reserved; 91 Bitfield<15,8> prescalar; 92 EndBitUnion(WatchdogCtrl) 93 94 protected: 95 std::string _name; 96 97 /** Pointer to parent class */ 98 CpuLocalTimer *parent; 99 100 /** Interrupt to cause/clear */ 101 ArmInterruptPin *intTimer; 102 ArmInterruptPin *intWatchdog; 103 104 /** Control register as specified above */ 105 TimerCtrl timerControl; 106 WatchdogCtrl watchdogControl; 107 108 /** If timer has caused an interrupt. This is irrespective of 109 * interrupt enable */ 110 bool rawIntTimer; 111 bool rawIntWatchdog; 112 bool rawResetWatchdog; 113 uint32_t watchdogDisableReg; 114 115 /** If an interrupt is currently pending. Logical and of Timer or 116 * Watchdog Ctrl.enable and rawIntTimer or rawIntWatchdog */ 117 bool pendingIntTimer; 118 bool pendingIntWatchdog; 119 120 /** Value to load into counters when periodic mode reaches 0 */ 121 uint32_t timerLoadValue; 122 uint32_t watchdogLoadValue; 123 124 /** Called when the counter reaches 0 */ 125 void timerAtZero(); 126 EventFunctionWrapper timerZeroEvent; 127 128 void watchdogAtZero(); 129 EventFunctionWrapper watchdogZeroEvent; 130 public: 131 /** Restart the counter ticking at val 132 * @param val the value to start at */ 133 void restartTimerCounter(uint32_t val); 134 void restartWatchdogCounter(uint32_t val); 135 136 Timer(const std::string &name, 137 CpuLocalTimer* _parent, 138 ArmInterruptPin* int_timer, 139 ArmInterruptPin* int_watchdog); 140 141 std::string name() const { return _name; } 142 143 /** Handle read for a single timer */ 144 void read(PacketPtr pkt, Addr daddr); 145 146 /** Handle write for a single timer */ 147 void write(PacketPtr pkt, Addr daddr); 148 149 void serialize(CheckpointOut &cp) const override; 150 void unserialize(CheckpointIn &cp) override; 151 152 friend class CpuLocalTimer; 153 }; 154 155 /** Pointer to the GIC for causing an interrupt */ 156 BaseGic *gic; 157 158 /** Timers that do the actual work */ 159 std::vector<std::unique_ptr<Timer>> localTimer; 160 161 public: 162 typedef CpuLocalTimerParams Params; 163 const Params * 164 params() const 165 { 166 return dynamic_cast<const Params *>(_params); 167 } 168 /** 169 * The constructor for RealView just registers itself with the MMU. 170 * @param p params structure 171 */ 172 CpuLocalTimer(Params *p); 173 174 /** Inits the local timers */ 175 void init() override; 176 177 /** 178 * Handle a read to the device 179 * @param pkt The memory request. 180 * @return Returns latency of device read 181 */ 182 Tick read(PacketPtr pkt) override; 183 184 /** 185 * Handle a write to the device. 186 * @param pkt The memory request. 187 * @return Returns latency of device write 188 */ 189 Tick write(PacketPtr pkt) override; 190 191 void serialize(CheckpointOut &cp) const override; 192 void unserialize(CheckpointIn &cp) override; 193}; 194 195 196#endif // __DEV_ARM_SP804_HH__ 197 198