timer_cpulocal.cc revision 9808
18512Sgeoffrey.blake@arm.com/* 29545Sandreas.hansson@arm.com * Copyright (c) 2010-2013 ARM Limited 38512Sgeoffrey.blake@arm.com * All rights reserved 48512Sgeoffrey.blake@arm.com * 58512Sgeoffrey.blake@arm.com * The license below extends only to copyright in the software and shall 68512Sgeoffrey.blake@arm.com * not be construed as granting a license to any other intellectual 78512Sgeoffrey.blake@arm.com * property including but not limited to intellectual property relating 88512Sgeoffrey.blake@arm.com * to a hardware implementation of the functionality of the software 98512Sgeoffrey.blake@arm.com * licensed hereunder. You may use the software subject to the license 108512Sgeoffrey.blake@arm.com * terms below provided that you ensure that this notice is replicated 118512Sgeoffrey.blake@arm.com * unmodified and in its entirety in all distributions of the software, 128512Sgeoffrey.blake@arm.com * modified or unmodified, in source code or in binary form. 138512Sgeoffrey.blake@arm.com * 148512Sgeoffrey.blake@arm.com * Redistribution and use in source and binary forms, with or without 158512Sgeoffrey.blake@arm.com * modification, are permitted provided that the following conditions are 168512Sgeoffrey.blake@arm.com * met: redistributions of source code must retain the above copyright 178512Sgeoffrey.blake@arm.com * notice, this list of conditions and the following disclaimer; 188512Sgeoffrey.blake@arm.com * redistributions in binary form must reproduce the above copyright 198512Sgeoffrey.blake@arm.com * notice, this list of conditions and the following disclaimer in the 208512Sgeoffrey.blake@arm.com * documentation and/or other materials provided with the distribution; 218512Sgeoffrey.blake@arm.com * neither the name of the copyright holders nor the names of its 228512Sgeoffrey.blake@arm.com * contributors may be used to endorse or promote products derived from 238512Sgeoffrey.blake@arm.com * this software without specific prior written permission. 248512Sgeoffrey.blake@arm.com * 258512Sgeoffrey.blake@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 268512Sgeoffrey.blake@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 278512Sgeoffrey.blake@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 288512Sgeoffrey.blake@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 298512Sgeoffrey.blake@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 308512Sgeoffrey.blake@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 318512Sgeoffrey.blake@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 328512Sgeoffrey.blake@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 338512Sgeoffrey.blake@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 348512Sgeoffrey.blake@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 358512Sgeoffrey.blake@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 368512Sgeoffrey.blake@arm.com * 378512Sgeoffrey.blake@arm.com * Authors: Ali Saidi 388512Sgeoffrey.blake@arm.com * Geoffrey Blake 398512Sgeoffrey.blake@arm.com */ 408512Sgeoffrey.blake@arm.com 418512Sgeoffrey.blake@arm.com#include "base/intmath.hh" 428512Sgeoffrey.blake@arm.com#include "base/trace.hh" 438512Sgeoffrey.blake@arm.com#include "debug/Checkpoint.hh" 448512Sgeoffrey.blake@arm.com#include "debug/Timer.hh" 459525SAndreas.Sandberg@ARM.com#include "dev/arm/base_gic.hh" 468512Sgeoffrey.blake@arm.com#include "dev/arm/timer_cpulocal.hh" 478512Sgeoffrey.blake@arm.com#include "mem/packet.hh" 488512Sgeoffrey.blake@arm.com#include "mem/packet_access.hh" 498512Sgeoffrey.blake@arm.com 508512Sgeoffrey.blake@arm.comCpuLocalTimer::CpuLocalTimer(Params *p) 519808Sstever@gmail.com : BasicPioDevice(p, 0x38), gic(p->gic) 528512Sgeoffrey.blake@arm.com{ 538512Sgeoffrey.blake@arm.com // Initialize the timer registers for each per cpu timer 548512Sgeoffrey.blake@arm.com for (int i = 0; i < CPU_MAX; i++) { 558512Sgeoffrey.blake@arm.com std::stringstream oss; 568512Sgeoffrey.blake@arm.com oss << name() << ".timer" << i; 578512Sgeoffrey.blake@arm.com localTimer[i]._name = oss.str(); 588512Sgeoffrey.blake@arm.com localTimer[i].parent = this; 598512Sgeoffrey.blake@arm.com localTimer[i].intNumTimer = p->int_num_timer; 608512Sgeoffrey.blake@arm.com localTimer[i].intNumWatchdog = p->int_num_watchdog; 618512Sgeoffrey.blake@arm.com localTimer[i].cpuNum = i; 628512Sgeoffrey.blake@arm.com } 638512Sgeoffrey.blake@arm.com} 648512Sgeoffrey.blake@arm.com 658512Sgeoffrey.blake@arm.comCpuLocalTimer::Timer::Timer() 668512Sgeoffrey.blake@arm.com : timerControl(0x0), watchdogControl(0x0), rawIntTimer(false), rawIntWatchdog(false), 678512Sgeoffrey.blake@arm.com rawResetWatchdog(false), watchdogDisableReg(0x0), pendingIntTimer(false), pendingIntWatchdog(false), 688512Sgeoffrey.blake@arm.com timerLoadValue(0x0), watchdogLoadValue(0x0), timerZeroEvent(this), watchdogZeroEvent(this) 698512Sgeoffrey.blake@arm.com{ 708512Sgeoffrey.blake@arm.com} 718512Sgeoffrey.blake@arm.com 728512Sgeoffrey.blake@arm.comTick 738512Sgeoffrey.blake@arm.comCpuLocalTimer::read(PacketPtr pkt) 748512Sgeoffrey.blake@arm.com{ 758512Sgeoffrey.blake@arm.com assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 768512Sgeoffrey.blake@arm.com assert(pkt->getSize() == 4); 778512Sgeoffrey.blake@arm.com Addr daddr = pkt->getAddr() - pioAddr; 788512Sgeoffrey.blake@arm.com pkt->allocate(); 798512Sgeoffrey.blake@arm.com int cpu_id = pkt->req->contextId(); 808512Sgeoffrey.blake@arm.com DPRINTF(Timer, "Reading from CpuLocalTimer at offset: %#x\n", daddr); 818512Sgeoffrey.blake@arm.com assert(cpu_id >= 0); 828512Sgeoffrey.blake@arm.com assert(cpu_id < CPU_MAX); 838512Sgeoffrey.blake@arm.com 848512Sgeoffrey.blake@arm.com if (daddr < Timer::Size) 858512Sgeoffrey.blake@arm.com localTimer[cpu_id].read(pkt, daddr); 868512Sgeoffrey.blake@arm.com else 878512Sgeoffrey.blake@arm.com panic("Tried to read CpuLocalTimer at offset %#x that doesn't exist\n", daddr); 888512Sgeoffrey.blake@arm.com pkt->makeAtomicResponse(); 898512Sgeoffrey.blake@arm.com return pioDelay; 908512Sgeoffrey.blake@arm.com} 918512Sgeoffrey.blake@arm.com 928512Sgeoffrey.blake@arm.com 938512Sgeoffrey.blake@arm.comvoid 948512Sgeoffrey.blake@arm.comCpuLocalTimer::Timer::read(PacketPtr pkt, Addr daddr) 958512Sgeoffrey.blake@arm.com{ 968512Sgeoffrey.blake@arm.com DPRINTF(Timer, "Reading from CpuLocalTimer at offset: %#x\n", daddr); 978512Sgeoffrey.blake@arm.com Tick time; 988512Sgeoffrey.blake@arm.com 998512Sgeoffrey.blake@arm.com switch(daddr) { 1008512Sgeoffrey.blake@arm.com case TimerLoadReg: 1018512Sgeoffrey.blake@arm.com pkt->set<uint32_t>(timerLoadValue); 1028512Sgeoffrey.blake@arm.com break; 1038512Sgeoffrey.blake@arm.com case TimerCounterReg: 1048512Sgeoffrey.blake@arm.com DPRINTF(Timer, "Event schedule for timer %d, clock=%d, prescale=%d\n", 1059545Sandreas.hansson@arm.com timerZeroEvent.when(), parent->clockPeriod(), 1069545Sandreas.hansson@arm.com timerControl.prescalar); 1078512Sgeoffrey.blake@arm.com time = timerZeroEvent.when() - curTick(); 1089545Sandreas.hansson@arm.com time = time / parent->clockPeriod() / 1099545Sandreas.hansson@arm.com power(16, timerControl.prescalar); 1108512Sgeoffrey.blake@arm.com DPRINTF(Timer, "-- returning counter at %d\n", time); 1118512Sgeoffrey.blake@arm.com pkt->set<uint32_t>(time); 1128512Sgeoffrey.blake@arm.com break; 1138512Sgeoffrey.blake@arm.com case TimerControlReg: 1148512Sgeoffrey.blake@arm.com pkt->set<uint32_t>(timerControl); 1158512Sgeoffrey.blake@arm.com break; 1168512Sgeoffrey.blake@arm.com case TimerIntStatusReg: 1178512Sgeoffrey.blake@arm.com pkt->set<uint32_t>(rawIntTimer); 1188512Sgeoffrey.blake@arm.com break; 1198512Sgeoffrey.blake@arm.com case WatchdogLoadReg: 1208512Sgeoffrey.blake@arm.com pkt->set<uint32_t>(watchdogLoadValue); 1218512Sgeoffrey.blake@arm.com break; 1228512Sgeoffrey.blake@arm.com case WatchdogCounterReg: 1239545Sandreas.hansson@arm.com DPRINTF(Timer, 1249545Sandreas.hansson@arm.com "Event schedule for watchdog %d, clock=%d, prescale=%d\n", 1259545Sandreas.hansson@arm.com watchdogZeroEvent.when(), parent->clockPeriod(), 1269545Sandreas.hansson@arm.com watchdogControl.prescalar); 1278512Sgeoffrey.blake@arm.com time = watchdogZeroEvent.when() - curTick(); 1289545Sandreas.hansson@arm.com time = time / parent->clockPeriod() / 1299545Sandreas.hansson@arm.com power(16, watchdogControl.prescalar); 1308512Sgeoffrey.blake@arm.com DPRINTF(Timer, "-- returning counter at %d\n", time); 1318512Sgeoffrey.blake@arm.com pkt->set<uint32_t>(time); 1328512Sgeoffrey.blake@arm.com break; 1338512Sgeoffrey.blake@arm.com case WatchdogControlReg: 1348512Sgeoffrey.blake@arm.com pkt->set<uint32_t>(watchdogControl); 1358512Sgeoffrey.blake@arm.com break; 1368512Sgeoffrey.blake@arm.com case WatchdogIntStatusReg: 1378512Sgeoffrey.blake@arm.com pkt->set<uint32_t>(rawIntWatchdog); 1388512Sgeoffrey.blake@arm.com break; 1398512Sgeoffrey.blake@arm.com case WatchdogResetStatusReg: 1408512Sgeoffrey.blake@arm.com pkt->set<uint32_t>(rawResetWatchdog); 1418512Sgeoffrey.blake@arm.com break; 1428512Sgeoffrey.blake@arm.com case WatchdogDisableReg: 1438512Sgeoffrey.blake@arm.com panic("Tried to read from WatchdogDisableRegister\n"); 1448512Sgeoffrey.blake@arm.com break; 1458512Sgeoffrey.blake@arm.com default: 1468512Sgeoffrey.blake@arm.com panic("Tried to read CpuLocalTimer at offset %#x\n", daddr); 1478512Sgeoffrey.blake@arm.com break; 1488512Sgeoffrey.blake@arm.com } 1498512Sgeoffrey.blake@arm.com} 1508512Sgeoffrey.blake@arm.com 1518512Sgeoffrey.blake@arm.comTick 1528512Sgeoffrey.blake@arm.comCpuLocalTimer::write(PacketPtr pkt) 1538512Sgeoffrey.blake@arm.com{ 1548512Sgeoffrey.blake@arm.com assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 1558512Sgeoffrey.blake@arm.com assert(pkt->getSize() == 4); 1568512Sgeoffrey.blake@arm.com Addr daddr = pkt->getAddr() - pioAddr; 1578512Sgeoffrey.blake@arm.com pkt->allocate(); 1588512Sgeoffrey.blake@arm.com int cpu_id = pkt->req->contextId(); 1598512Sgeoffrey.blake@arm.com DPRINTF(Timer, "Writing to CpuLocalTimer at offset: %#x\n", daddr); 1608512Sgeoffrey.blake@arm.com assert(cpu_id >= 0); 1618512Sgeoffrey.blake@arm.com assert(cpu_id < CPU_MAX); 1628512Sgeoffrey.blake@arm.com 1638512Sgeoffrey.blake@arm.com if (daddr < Timer::Size) 1648512Sgeoffrey.blake@arm.com localTimer[cpu_id].write(pkt, daddr); 1658512Sgeoffrey.blake@arm.com else 1668512Sgeoffrey.blake@arm.com panic("Tried to write CpuLocalTimer at offset %#x that doesn't exist\n", daddr); 1678512Sgeoffrey.blake@arm.com pkt->makeAtomicResponse(); 1688512Sgeoffrey.blake@arm.com return pioDelay; 1698512Sgeoffrey.blake@arm.com} 1708512Sgeoffrey.blake@arm.com 1718512Sgeoffrey.blake@arm.comvoid 1728512Sgeoffrey.blake@arm.comCpuLocalTimer::Timer::write(PacketPtr pkt, Addr daddr) 1738512Sgeoffrey.blake@arm.com{ 1748512Sgeoffrey.blake@arm.com DPRINTF(Timer, "Writing to CpuLocalTimer at offset: %#x\n", daddr); 1758512Sgeoffrey.blake@arm.com bool old_enable; 1768512Sgeoffrey.blake@arm.com bool old_wd_mode; 1778512Sgeoffrey.blake@arm.com uint32_t old_val; 1788512Sgeoffrey.blake@arm.com 1798512Sgeoffrey.blake@arm.com switch (daddr) { 1808512Sgeoffrey.blake@arm.com case TimerLoadReg: 1818512Sgeoffrey.blake@arm.com // Writing to this register also resets the counter register and 1828512Sgeoffrey.blake@arm.com // starts decrementing if the counter is enabled. 1838512Sgeoffrey.blake@arm.com timerLoadValue = pkt->get<uint32_t>(); 1848512Sgeoffrey.blake@arm.com restartTimerCounter(timerLoadValue); 1858512Sgeoffrey.blake@arm.com break; 1868512Sgeoffrey.blake@arm.com case TimerCounterReg: 1878512Sgeoffrey.blake@arm.com // Can be written, doesn't start counting unless the timer is enabled 1888512Sgeoffrey.blake@arm.com restartTimerCounter(pkt->get<uint32_t>()); 1898512Sgeoffrey.blake@arm.com break; 1908512Sgeoffrey.blake@arm.com case TimerControlReg: 1918512Sgeoffrey.blake@arm.com old_enable = timerControl.enable; 1928512Sgeoffrey.blake@arm.com timerControl = pkt->get<uint32_t>(); 1938512Sgeoffrey.blake@arm.com if ((old_enable == 0) && timerControl.enable) 1948512Sgeoffrey.blake@arm.com restartTimerCounter(timerLoadValue); 1958512Sgeoffrey.blake@arm.com break; 1968512Sgeoffrey.blake@arm.com case TimerIntStatusReg: 1978512Sgeoffrey.blake@arm.com rawIntTimer = false; 1988512Sgeoffrey.blake@arm.com if (pendingIntTimer) { 1998512Sgeoffrey.blake@arm.com pendingIntTimer = false; 2008512Sgeoffrey.blake@arm.com DPRINTF(Timer, "Clearing interrupt\n"); 2018512Sgeoffrey.blake@arm.com } 2028512Sgeoffrey.blake@arm.com break; 2038512Sgeoffrey.blake@arm.com case WatchdogLoadReg: 2048512Sgeoffrey.blake@arm.com watchdogLoadValue = pkt->get<uint32_t>(); 2058512Sgeoffrey.blake@arm.com restartWatchdogCounter(watchdogLoadValue); 2068512Sgeoffrey.blake@arm.com break; 2078512Sgeoffrey.blake@arm.com case WatchdogCounterReg: 2088512Sgeoffrey.blake@arm.com // Can't be written when in watchdog mode, but can in timer mode 2098512Sgeoffrey.blake@arm.com if (!watchdogControl.watchdogMode) { 2108512Sgeoffrey.blake@arm.com restartWatchdogCounter(pkt->get<uint32_t>()); 2118512Sgeoffrey.blake@arm.com } 2128512Sgeoffrey.blake@arm.com break; 2138512Sgeoffrey.blake@arm.com case WatchdogControlReg: 2148512Sgeoffrey.blake@arm.com old_enable = watchdogControl.enable; 2158512Sgeoffrey.blake@arm.com old_wd_mode = watchdogControl.watchdogMode; 2168512Sgeoffrey.blake@arm.com watchdogControl = pkt->get<uint32_t>(); 2178512Sgeoffrey.blake@arm.com if ((old_enable == 0) && watchdogControl.enable) 2188512Sgeoffrey.blake@arm.com restartWatchdogCounter(watchdogLoadValue); 2198512Sgeoffrey.blake@arm.com // cannot disable watchdog using control register 2208512Sgeoffrey.blake@arm.com if ((old_wd_mode == 1) && watchdogControl.watchdogMode == 0) 2218512Sgeoffrey.blake@arm.com watchdogControl.watchdogMode = 1; 2228512Sgeoffrey.blake@arm.com break; 2238512Sgeoffrey.blake@arm.com case WatchdogIntStatusReg: 2248512Sgeoffrey.blake@arm.com rawIntWatchdog = false; 2258512Sgeoffrey.blake@arm.com if (pendingIntWatchdog) { 2268512Sgeoffrey.blake@arm.com pendingIntWatchdog = false; 2278512Sgeoffrey.blake@arm.com DPRINTF(Timer, "Clearing watchdog interrupt\n"); 2288512Sgeoffrey.blake@arm.com } 2298512Sgeoffrey.blake@arm.com break; 2308512Sgeoffrey.blake@arm.com case WatchdogResetStatusReg: 2318512Sgeoffrey.blake@arm.com rawResetWatchdog = false; 2328512Sgeoffrey.blake@arm.com DPRINTF(Timer, "Clearing watchdog reset flag\n"); 2338512Sgeoffrey.blake@arm.com break; 2348512Sgeoffrey.blake@arm.com case WatchdogDisableReg: 2358512Sgeoffrey.blake@arm.com old_val = watchdogDisableReg; 2368512Sgeoffrey.blake@arm.com watchdogDisableReg = pkt->get<uint32_t>(); 2378512Sgeoffrey.blake@arm.com // if this sequence is observed, turn off watchdog mode 2388512Sgeoffrey.blake@arm.com if (old_val == 0x12345678 && watchdogDisableReg == 0x87654321) 2398512Sgeoffrey.blake@arm.com watchdogControl.watchdogMode = 0; 2408512Sgeoffrey.blake@arm.com break; 2418512Sgeoffrey.blake@arm.com default: 2428512Sgeoffrey.blake@arm.com panic("Tried to write CpuLocalTimer timer at offset %#x\n", daddr); 2438512Sgeoffrey.blake@arm.com break; 2448512Sgeoffrey.blake@arm.com } 2458512Sgeoffrey.blake@arm.com} 2468512Sgeoffrey.blake@arm.com 2478512Sgeoffrey.blake@arm.com//XXX: Two functions are needed because the control registers are different types 2488512Sgeoffrey.blake@arm.comvoid 2498512Sgeoffrey.blake@arm.comCpuLocalTimer::Timer::restartTimerCounter(uint32_t val) 2508512Sgeoffrey.blake@arm.com{ 2518512Sgeoffrey.blake@arm.com DPRINTF(Timer, "Resetting timer counter with value %#x\n", val); 2528512Sgeoffrey.blake@arm.com if (!timerControl.enable) 2538512Sgeoffrey.blake@arm.com return; 2548512Sgeoffrey.blake@arm.com 2559545Sandreas.hansson@arm.com Tick time = parent->clockPeriod() * power(16, timerControl.prescalar); 2568512Sgeoffrey.blake@arm.com time *= val; 2578512Sgeoffrey.blake@arm.com 2588512Sgeoffrey.blake@arm.com if (timerZeroEvent.scheduled()) { 2598512Sgeoffrey.blake@arm.com DPRINTF(Timer, "-- Event was already schedule, de-scheduling\n"); 2608512Sgeoffrey.blake@arm.com parent->deschedule(timerZeroEvent); 2618512Sgeoffrey.blake@arm.com } 2628512Sgeoffrey.blake@arm.com parent->schedule(timerZeroEvent, curTick() + time); 2638512Sgeoffrey.blake@arm.com DPRINTF(Timer, "-- Scheduling new event for: %d\n", curTick() + time); 2648512Sgeoffrey.blake@arm.com} 2658512Sgeoffrey.blake@arm.com 2668512Sgeoffrey.blake@arm.comvoid 2678512Sgeoffrey.blake@arm.comCpuLocalTimer::Timer::restartWatchdogCounter(uint32_t val) 2688512Sgeoffrey.blake@arm.com{ 2698512Sgeoffrey.blake@arm.com DPRINTF(Timer, "Resetting watchdog counter with value %#x\n", val); 2708512Sgeoffrey.blake@arm.com if (!watchdogControl.enable) 2718512Sgeoffrey.blake@arm.com return; 2728512Sgeoffrey.blake@arm.com 2739545Sandreas.hansson@arm.com Tick time = parent->clockPeriod() * power(16, watchdogControl.prescalar); 2748512Sgeoffrey.blake@arm.com time *= val; 2758512Sgeoffrey.blake@arm.com 2768512Sgeoffrey.blake@arm.com if (watchdogZeroEvent.scheduled()) { 2778512Sgeoffrey.blake@arm.com DPRINTF(Timer, "-- Event was already schedule, de-scheduling\n"); 2788512Sgeoffrey.blake@arm.com parent->deschedule(watchdogZeroEvent); 2798512Sgeoffrey.blake@arm.com } 2808512Sgeoffrey.blake@arm.com parent->schedule(watchdogZeroEvent, curTick() + time); 2818512Sgeoffrey.blake@arm.com DPRINTF(Timer, "-- Scheduling new event for: %d\n", curTick() + time); 2828512Sgeoffrey.blake@arm.com} 2838512Sgeoffrey.blake@arm.com////// 2848512Sgeoffrey.blake@arm.com 2858512Sgeoffrey.blake@arm.comvoid 2868512Sgeoffrey.blake@arm.comCpuLocalTimer::Timer::timerAtZero() 2878512Sgeoffrey.blake@arm.com{ 2888512Sgeoffrey.blake@arm.com if (!timerControl.enable) 2898512Sgeoffrey.blake@arm.com return; 2908512Sgeoffrey.blake@arm.com 2918512Sgeoffrey.blake@arm.com DPRINTF(Timer, "Timer Counter reached zero\n"); 2928512Sgeoffrey.blake@arm.com 2938512Sgeoffrey.blake@arm.com rawIntTimer = true; 2948512Sgeoffrey.blake@arm.com bool old_pending = pendingIntTimer; 2958512Sgeoffrey.blake@arm.com if (timerControl.intEnable) 2968512Sgeoffrey.blake@arm.com pendingIntTimer = true; 2978993SAli.Saidi@ARM.com if (pendingIntTimer && !old_pending) { 2988512Sgeoffrey.blake@arm.com DPRINTF(Timer, "-- Causing interrupt\n"); 2998512Sgeoffrey.blake@arm.com parent->gic->sendPPInt(intNumTimer, cpuNum); 3008512Sgeoffrey.blake@arm.com } 3018512Sgeoffrey.blake@arm.com 3028512Sgeoffrey.blake@arm.com if (!timerControl.autoReload) 3038512Sgeoffrey.blake@arm.com return; 3048512Sgeoffrey.blake@arm.com else 3058512Sgeoffrey.blake@arm.com restartTimerCounter(timerLoadValue); 3068512Sgeoffrey.blake@arm.com} 3078512Sgeoffrey.blake@arm.com 3088512Sgeoffrey.blake@arm.comvoid 3098512Sgeoffrey.blake@arm.comCpuLocalTimer::Timer::watchdogAtZero() 3108512Sgeoffrey.blake@arm.com{ 3118512Sgeoffrey.blake@arm.com if (!watchdogControl.enable) 3128512Sgeoffrey.blake@arm.com return; 3138512Sgeoffrey.blake@arm.com 3148512Sgeoffrey.blake@arm.com DPRINTF(Timer, "Watchdog Counter reached zero\n"); 3158512Sgeoffrey.blake@arm.com 3168512Sgeoffrey.blake@arm.com rawIntWatchdog = true; 3178512Sgeoffrey.blake@arm.com bool old_pending = pendingIntWatchdog; 3188512Sgeoffrey.blake@arm.com // generates an interrupt only if the watchdog is in timer 3198512Sgeoffrey.blake@arm.com // mode. 3208512Sgeoffrey.blake@arm.com if (watchdogControl.intEnable && !watchdogControl.watchdogMode) 3218512Sgeoffrey.blake@arm.com pendingIntWatchdog = true; 3228512Sgeoffrey.blake@arm.com else if (watchdogControl.watchdogMode) { 3238512Sgeoffrey.blake@arm.com rawResetWatchdog = true; 3248512Sgeoffrey.blake@arm.com fatal("gem5 ARM Model does not support true watchdog operation!\n"); 3258512Sgeoffrey.blake@arm.com //XXX: Should we ever support a true watchdog reset? 3268512Sgeoffrey.blake@arm.com } 3278512Sgeoffrey.blake@arm.com 3288993SAli.Saidi@ARM.com if (pendingIntWatchdog && !old_pending) { 3298512Sgeoffrey.blake@arm.com DPRINTF(Timer, "-- Causing interrupt\n"); 3308512Sgeoffrey.blake@arm.com parent->gic->sendPPInt(intNumWatchdog, cpuNum); 3318512Sgeoffrey.blake@arm.com } 3328512Sgeoffrey.blake@arm.com 3338512Sgeoffrey.blake@arm.com if (watchdogControl.watchdogMode) 3348512Sgeoffrey.blake@arm.com return; 3358512Sgeoffrey.blake@arm.com else if (watchdogControl.autoReload) 3368512Sgeoffrey.blake@arm.com restartWatchdogCounter(watchdogLoadValue); 3378512Sgeoffrey.blake@arm.com} 3388512Sgeoffrey.blake@arm.com 3398512Sgeoffrey.blake@arm.comvoid 3408512Sgeoffrey.blake@arm.comCpuLocalTimer::Timer::serialize(std::ostream &os) 3418512Sgeoffrey.blake@arm.com{ 3428512Sgeoffrey.blake@arm.com DPRINTF(Checkpoint, "Serializing Arm CpuLocalTimer\n"); 3438512Sgeoffrey.blake@arm.com SERIALIZE_SCALAR(intNumTimer); 3448512Sgeoffrey.blake@arm.com SERIALIZE_SCALAR(intNumWatchdog); 3458512Sgeoffrey.blake@arm.com 3468512Sgeoffrey.blake@arm.com uint32_t timer_control_serial = timerControl; 3478512Sgeoffrey.blake@arm.com uint32_t watchdog_control_serial = watchdogControl; 3488512Sgeoffrey.blake@arm.com SERIALIZE_SCALAR(timer_control_serial); 3498512Sgeoffrey.blake@arm.com SERIALIZE_SCALAR(watchdog_control_serial); 3508512Sgeoffrey.blake@arm.com 3518512Sgeoffrey.blake@arm.com SERIALIZE_SCALAR(rawIntTimer); 3528512Sgeoffrey.blake@arm.com SERIALIZE_SCALAR(rawIntWatchdog); 3538512Sgeoffrey.blake@arm.com SERIALIZE_SCALAR(rawResetWatchdog); 3548512Sgeoffrey.blake@arm.com SERIALIZE_SCALAR(watchdogDisableReg); 3558512Sgeoffrey.blake@arm.com SERIALIZE_SCALAR(pendingIntTimer); 3568512Sgeoffrey.blake@arm.com SERIALIZE_SCALAR(pendingIntWatchdog); 3578512Sgeoffrey.blake@arm.com SERIALIZE_SCALAR(timerLoadValue); 3588512Sgeoffrey.blake@arm.com SERIALIZE_SCALAR(watchdogLoadValue); 3598512Sgeoffrey.blake@arm.com 3608512Sgeoffrey.blake@arm.com bool timer_is_in_event = timerZeroEvent.scheduled(); 3618512Sgeoffrey.blake@arm.com SERIALIZE_SCALAR(timer_is_in_event); 3628512Sgeoffrey.blake@arm.com bool watchdog_is_in_event = watchdogZeroEvent.scheduled(); 3638512Sgeoffrey.blake@arm.com SERIALIZE_SCALAR(watchdog_is_in_event); 3648512Sgeoffrey.blake@arm.com 3658512Sgeoffrey.blake@arm.com Tick timer_event_time; 3668512Sgeoffrey.blake@arm.com if (timer_is_in_event){ 3678512Sgeoffrey.blake@arm.com timer_event_time = timerZeroEvent.when(); 3688512Sgeoffrey.blake@arm.com SERIALIZE_SCALAR(timer_event_time); 3698512Sgeoffrey.blake@arm.com } 3708512Sgeoffrey.blake@arm.com Tick watchdog_event_time; 3718512Sgeoffrey.blake@arm.com if (watchdog_is_in_event){ 3728512Sgeoffrey.blake@arm.com watchdog_event_time = watchdogZeroEvent.when(); 3738512Sgeoffrey.blake@arm.com SERIALIZE_SCALAR(watchdog_event_time); 3748512Sgeoffrey.blake@arm.com } 3758512Sgeoffrey.blake@arm.com} 3768512Sgeoffrey.blake@arm.com 3778512Sgeoffrey.blake@arm.comvoid 3788512Sgeoffrey.blake@arm.comCpuLocalTimer::Timer::unserialize(Checkpoint *cp, const std::string §ion) 3798512Sgeoffrey.blake@arm.com{ 3808512Sgeoffrey.blake@arm.com DPRINTF(Checkpoint, "Unserializing Arm CpuLocalTimer\n"); 3818512Sgeoffrey.blake@arm.com 3828512Sgeoffrey.blake@arm.com UNSERIALIZE_SCALAR(intNumTimer); 3838512Sgeoffrey.blake@arm.com UNSERIALIZE_SCALAR(intNumWatchdog); 3848512Sgeoffrey.blake@arm.com 3858512Sgeoffrey.blake@arm.com uint32_t timer_control_serial; 3868512Sgeoffrey.blake@arm.com UNSERIALIZE_SCALAR(timer_control_serial); 3878512Sgeoffrey.blake@arm.com timerControl = timer_control_serial; 3888512Sgeoffrey.blake@arm.com uint32_t watchdog_control_serial; 3898512Sgeoffrey.blake@arm.com UNSERIALIZE_SCALAR(watchdog_control_serial); 3908512Sgeoffrey.blake@arm.com watchdogControl = watchdog_control_serial; 3918512Sgeoffrey.blake@arm.com 3928512Sgeoffrey.blake@arm.com UNSERIALIZE_SCALAR(rawIntTimer); 3938512Sgeoffrey.blake@arm.com UNSERIALIZE_SCALAR(rawIntWatchdog); 3948512Sgeoffrey.blake@arm.com UNSERIALIZE_SCALAR(rawResetWatchdog); 3958512Sgeoffrey.blake@arm.com UNSERIALIZE_SCALAR(watchdogDisableReg); 3968512Sgeoffrey.blake@arm.com UNSERIALIZE_SCALAR(pendingIntTimer); 3978512Sgeoffrey.blake@arm.com UNSERIALIZE_SCALAR(pendingIntWatchdog); 3988512Sgeoffrey.blake@arm.com UNSERIALIZE_SCALAR(timerLoadValue); 3998512Sgeoffrey.blake@arm.com UNSERIALIZE_SCALAR(watchdogLoadValue); 4008512Sgeoffrey.blake@arm.com 4018512Sgeoffrey.blake@arm.com bool timer_is_in_event; 4028512Sgeoffrey.blake@arm.com UNSERIALIZE_SCALAR(timer_is_in_event); 4038512Sgeoffrey.blake@arm.com bool watchdog_is_in_event; 4048512Sgeoffrey.blake@arm.com UNSERIALIZE_SCALAR(watchdog_is_in_event); 4058512Sgeoffrey.blake@arm.com 4068512Sgeoffrey.blake@arm.com Tick timer_event_time; 4078512Sgeoffrey.blake@arm.com if (timer_is_in_event){ 4088512Sgeoffrey.blake@arm.com UNSERIALIZE_SCALAR(timer_event_time); 4098512Sgeoffrey.blake@arm.com parent->schedule(timerZeroEvent, timer_event_time); 4108512Sgeoffrey.blake@arm.com } 4118512Sgeoffrey.blake@arm.com Tick watchdog_event_time; 4128512Sgeoffrey.blake@arm.com if (watchdog_is_in_event) { 4138512Sgeoffrey.blake@arm.com UNSERIALIZE_SCALAR(watchdog_event_time); 4148512Sgeoffrey.blake@arm.com parent->schedule(watchdogZeroEvent, watchdog_event_time); 4158512Sgeoffrey.blake@arm.com } 4168512Sgeoffrey.blake@arm.com} 4178512Sgeoffrey.blake@arm.com 4188512Sgeoffrey.blake@arm.com 4198512Sgeoffrey.blake@arm.com 4208512Sgeoffrey.blake@arm.comvoid 4218512Sgeoffrey.blake@arm.comCpuLocalTimer::serialize(std::ostream &os) 4228512Sgeoffrey.blake@arm.com{ 4238512Sgeoffrey.blake@arm.com for (int i = 0; i < CPU_MAX; i++) { 4248512Sgeoffrey.blake@arm.com nameOut(os, csprintf("%s.timer%d", name(), i)); 4258512Sgeoffrey.blake@arm.com localTimer[i].serialize(os); 4268512Sgeoffrey.blake@arm.com } 4278512Sgeoffrey.blake@arm.com} 4288512Sgeoffrey.blake@arm.com 4298512Sgeoffrey.blake@arm.comvoid 4308512Sgeoffrey.blake@arm.comCpuLocalTimer::unserialize(Checkpoint *cp, const std::string §ion) 4318512Sgeoffrey.blake@arm.com{ 4328512Sgeoffrey.blake@arm.com for (int i = 0; i < CPU_MAX; i++) { 4338512Sgeoffrey.blake@arm.com localTimer[i].unserialize(cp, csprintf("%s.timer%d", section, i)); 4348512Sgeoffrey.blake@arm.com } 4358512Sgeoffrey.blake@arm.com} 4368512Sgeoffrey.blake@arm.com 4378512Sgeoffrey.blake@arm.comCpuLocalTimer * 4388512Sgeoffrey.blake@arm.comCpuLocalTimerParams::create() 4398512Sgeoffrey.blake@arm.com{ 4408512Sgeoffrey.blake@arm.com return new CpuLocalTimer(this); 4418512Sgeoffrey.blake@arm.com} 442