smmu_v3_slaveifc.hh revision 14252
11689SN/A/* 28948Sandreas.hansson@arm.com * Copyright (c) 2013, 2018-2019 ARM Limited 38707Sandreas.hansson@arm.com * All rights reserved 48707Sandreas.hansson@arm.com * 58707Sandreas.hansson@arm.com * The license below extends only to copyright in the software and shall 68707Sandreas.hansson@arm.com * not be construed as granting a license to any other intellectual 78707Sandreas.hansson@arm.com * property including but not limited to intellectual property relating 88707Sandreas.hansson@arm.com * to a hardware implementation of the functionality of the software 98707Sandreas.hansson@arm.com * licensed hereunder. You may use the software subject to the license 108707Sandreas.hansson@arm.com * terms below provided that you ensure that this notice is replicated 118707Sandreas.hansson@arm.com * unmodified and in its entirety in all distributions of the software, 128707Sandreas.hansson@arm.com * modified or unmodified, in source code or in binary form. 138707Sandreas.hansson@arm.com * 142325SN/A * Redistribution and use in source and binary forms, with or without 157897Shestness@cs.utexas.edu * modification, are permitted provided that the following conditions are 161689SN/A * met: redistributions of source code must retain the above copyright 171689SN/A * notice, this list of conditions and the following disclaimer; 181689SN/A * redistributions in binary form must reproduce the above copyright 191689SN/A * notice, this list of conditions and the following disclaimer in the 201689SN/A * documentation and/or other materials provided with the distribution; 211689SN/A * neither the name of the copyright holders nor the names of its 221689SN/A * contributors may be used to endorse or promote products derived from 231689SN/A * this software without specific prior written permission. 241689SN/A * 251689SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 261689SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 271689SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 281689SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 291689SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 301689SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 311689SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 321689SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 331689SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 341689SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 351689SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 361689SN/A * 371689SN/A * Authors: Stan Czerniawski 381689SN/A */ 391689SN/A 402665Ssaidi@eecs.umich.edu#ifndef __DEV_ARM_SMMU_V3_SLAVEIFC_HH__ 412665Ssaidi@eecs.umich.edu#define __DEV_ARM_SMMU_V3_SLAVEIFC_HH__ 422756Sksewell@umich.edu 437897Shestness@cs.utexas.edu#include <list> 441689SN/A 451689SN/A#include "dev/arm/smmu_v3_caches.hh" 468779Sgblack@eecs.umich.edu#include "dev/arm/smmu_v3_defs.hh" 476658Snate@binkert.org#include "dev/arm/smmu_v3_events.hh" 488887Sgeoffrey.blake@arm.com#include "dev/arm/smmu_v3_ports.hh" 498887Sgeoffrey.blake@arm.com#include "dev/arm/smmu_v3_proc.hh" 508229Snate@binkert.org#include "params/SMMUv3SlaveInterface.hh" 518229Snate@binkert.org#include "sim/clocked_object.hh" 528229Snate@binkert.org 534762Snate@binkert.orgclass SMMUTranslationProcess; 548779Sgblack@eecs.umich.educlass SMMUv3; 554762Snate@binkert.orgclass SMMUSlavePort; 564762Snate@binkert.org 578232Snate@binkert.orgclass SMMUv3SlaveInterface : public ClockedObject 589152Satgutier@umich.edu{ 598232Snate@binkert.org protected: 608232Snate@binkert.org friend class SMMUTranslationProcess; 614762Snate@binkert.org 624762Snate@binkert.org public: 638793Sgblack@eecs.umich.edu SMMUv3 *smmu; 648779Sgblack@eecs.umich.edu SMMUTLB* microTLB; 654762Snate@binkert.org SMMUTLB* mainTLB; 668460SAli.Saidi@ARM.com 674762Snate@binkert.org const bool microTLBEnable; 685702Ssaidi@eecs.umich.edu const bool mainTLBEnable; 695702Ssaidi@eecs.umich.edu 708232Snate@binkert.org SMMUSemaphore slavePortSem; 715702Ssaidi@eecs.umich.edu SMMUSemaphore microTLBSem; 725702Ssaidi@eecs.umich.edu SMMUSemaphore mainTLBSem; 738737Skoansin.tan@gmail.com 745529Snate@binkert.org const Cycles microTLBLat; 752669Sktlim@umich.edu const Cycles mainTLBLat; 766221Snate@binkert.org 771060SN/A SMMUSlavePort *slavePort; 785529Snate@binkert.org SMMUATSSlavePort atsSlavePort; 795712Shsul@eecs.umich.edu SMMUATSMasterPort atsMasterPort; 801060SN/A 811060SN/A // in bytes 821060SN/A const unsigned portWidth; 832292SN/A 842733Sktlim@umich.edu unsigned wrBufSlotsRemaining; 852292SN/A unsigned xlateSlotsRemaining; 862292SN/A unsigned pendingMemAccesses; 872292SN/A 882292SN/A const bool prefetchEnable; 898707Sandreas.hansson@arm.com const bool prefetchReserveLastWay; 908707Sandreas.hansson@arm.com 918975Sandreas.hansson@arm.com std::list<SMMUTranslationProcess *> duplicateReqs; 928707Sandreas.hansson@arm.com SMMUSignal duplicateReqRemoved; 938707Sandreas.hansson@arm.com 948948Sandreas.hansson@arm.com std::list<SMMUTranslationProcess *> dependentReads[SMMU_MAX_TRANS_ID]; 958948Sandreas.hansson@arm.com std::list<SMMUTranslationProcess *> dependentWrites[SMMU_MAX_TRANS_ID]; 968948Sandreas.hansson@arm.com SMMUSignal dependentReqRemoved; 978707Sandreas.hansson@arm.com 988707Sandreas.hansson@arm.com // Receiving translation requests from the master device 998707Sandreas.hansson@arm.com Tick recvAtomic(PacketPtr pkt); 1008707Sandreas.hansson@arm.com bool recvTimingReq(PacketPtr pkt); 1018707Sandreas.hansson@arm.com void schedTimingResp(PacketPtr pkt); 1028707Sandreas.hansson@arm.com 1038707Sandreas.hansson@arm.com Tick atsSlaveRecvAtomic(PacketPtr pkt); 1048707Sandreas.hansson@arm.com bool atsSlaveRecvTimingReq(PacketPtr pkt); 1058707Sandreas.hansson@arm.com bool atsMasterRecvTimingResp(PacketPtr pkt); 1068707Sandreas.hansson@arm.com void schedAtsTimingResp(PacketPtr pkt); 1078707Sandreas.hansson@arm.com 1088707Sandreas.hansson@arm.com void scheduleDeviceRetry(); 1098707Sandreas.hansson@arm.com void sendDeviceRetry(); 1108975Sandreas.hansson@arm.com void atsSendDeviceRetry(); 1118707Sandreas.hansson@arm.com 1128975Sandreas.hansson@arm.com bool deviceNeedsRetry; 1138707Sandreas.hansson@arm.com bool atsDeviceNeedsRetry; 1148707Sandreas.hansson@arm.com 1158707Sandreas.hansson@arm.com SMMUDeviceRetryEvent sendDeviceRetryEvent; 1168975Sandreas.hansson@arm.com EventWrapper< 1178975Sandreas.hansson@arm.com SMMUv3SlaveInterface, 1188948Sandreas.hansson@arm.com &SMMUv3SlaveInterface::atsSendDeviceRetry> atsSendDeviceRetryEvent; 1198975Sandreas.hansson@arm.com 1208948Sandreas.hansson@arm.com Port& getPort(const std::string &name, PortID id) override; 1218948Sandreas.hansson@arm.com 1228948Sandreas.hansson@arm.com public: 1238707Sandreas.hansson@arm.com SMMUv3SlaveInterface(const SMMUv3SlaveInterfaceParams *p); 1248707Sandreas.hansson@arm.com 1258707Sandreas.hansson@arm.com ~SMMUv3SlaveInterface() 1268707Sandreas.hansson@arm.com { 1278707Sandreas.hansson@arm.com delete microTLB; 1288707Sandreas.hansson@arm.com delete mainTLB; 1291060SN/A } 1301755SN/A 1315606Snate@binkert.org const SMMUv3SlaveInterfaceParams * 1321060SN/A params() const 1331060SN/A { 1341060SN/A return static_cast<const SMMUv3SlaveInterfaceParams *>(_params); 1351060SN/A } 1361060SN/A 1371755SN/A DrainState drain() override; 1381060SN/A 1391060SN/A void setSMMU(SMMUv3 *_smmu) { smmu = _smmu; } 1401060SN/A void sendRange(); 1411060SN/A}; 1421060SN/A 1431060SN/A#endif /* __DEV_ARM_SMMU_V3_SLAVEIFC_HH__ */ 1445336Shines@cs.fsu.edu