rv_ctrl.hh revision 9958:48eb085bc9ab 
1/*
2 * Copyright (c) 2010,2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Ali Saidi
38 */
39
40#ifndef __DEV_ARM_RV_HH__
41#define __DEV_ARM_RV_HH__
42
43#include "base/bitunion.hh"
44#include "dev/io_device.hh"
45#include "params/RealViewCtrl.hh"
46
47/** @file
48 * This implements the simple real view registers on a PBXA9
49 */
50
51class RealViewCtrl : public BasicPioDevice
52{
53  protected:
54    enum {
55        IdReg      = 0x00,
56        SwReg      = 0x04,
57        Led        = 0x08,
58        Osc0       = 0x0C,
59        Osc1       = 0x10,
60        Osc2       = 0x14,
61        Osc3       = 0x18,
62        Osc4       = 0x1C,
63        Lock       = 0x20,
64        Clock100   = 0x24,
65        CfgData1   = 0x28,
66        CfgData2   = 0x2C,
67        Flags      = 0x30,
68        FlagsClr   = 0x34,
69        NvFlags    = 0x38,
70        NvFlagsClr = 0x3C,
71        ResetCtl   = 0x40,
72        PciCtl     = 0x44,
73        MciCtl     = 0x48,
74        Flash      = 0x4C,
75        Clcd       = 0x50,
76        ClcdSer    = 0x54,
77        Bootcs     = 0x58,
78        Clock24    = 0x5C,
79        Misc       = 0x60,
80        IoSel      = 0x70,
81        ProcId0    = 0x84,
82        ProcId1    = 0x88,
83        CfgData    = 0xA0,
84        CfgCtrl    = 0xA4,
85        CfgStat    = 0xA8,
86        TestOsc0   = 0xC0,
87        TestOsc1   = 0xC4,
88        TestOsc2   = 0xC8,
89        TestOsc3   = 0xCC,
90        TestOsc4   = 0xD0
91    };
92
93    // system lock value
94    BitUnion32(SysLockReg)
95        Bitfield<15,0> lockVal;
96        Bitfield<16> locked;
97    EndBitUnion(SysLockReg)
98
99    SysLockReg sysLock;
100
101    /** This register is used for smp booting.
102     * The primary cpu writes the secondary start address here before
103     * sends it a soft interrupt. The secondary cpu reads this register and if
104     * it's non-zero it jumps to the address
105     */
106    uint32_t flags;
107
108    /** This register contains the result from a system control reg access
109     */
110    uint32_t scData;
111
112  public:
113    typedef RealViewCtrlParams Params;
114    const Params *
115    params() const
116    {
117        return dynamic_cast<const Params *>(_params);
118    }
119    /**
120      * The constructor for RealView just registers itself with the MMU.
121      * @param p params structure
122      */
123    RealViewCtrl(Params *p);
124
125    /**
126     * Handle a read to the device
127     * @param pkt The memory request.
128     * @param data Where to put the data.
129     */
130    virtual Tick read(PacketPtr pkt);
131
132    /**
133     * All writes are simply ignored.
134     * @param pkt The memory request.
135     * @param data the data
136     */
137    virtual Tick write(PacketPtr pkt);
138
139
140    virtual void serialize(std::ostream &os);
141    virtual void unserialize(Checkpoint *cp, const std::string &section);
142};
143
144
145#endif // __DEV_ARM_RV_HH__
146