rv_ctrl.hh revision 11421
17584SAli.Saidi@arm.com/* 211011SAndreas.Sandberg@ARM.com * Copyright (c) 2010,2013,2015 ARM Limited 37584SAli.Saidi@arm.com * All rights reserved 47584SAli.Saidi@arm.com * 57584SAli.Saidi@arm.com * The license below extends only to copyright in the software and shall 67584SAli.Saidi@arm.com * not be construed as granting a license to any other intellectual 77584SAli.Saidi@arm.com * property including but not limited to intellectual property relating 87584SAli.Saidi@arm.com * to a hardware implementation of the functionality of the software 97584SAli.Saidi@arm.com * licensed hereunder. You may use the software subject to the license 107584SAli.Saidi@arm.com * terms below provided that you ensure that this notice is replicated 117584SAli.Saidi@arm.com * unmodified and in its entirety in all distributions of the software, 127584SAli.Saidi@arm.com * modified or unmodified, in source code or in binary form. 137584SAli.Saidi@arm.com * 147584SAli.Saidi@arm.com * Redistribution and use in source and binary forms, with or without 157584SAli.Saidi@arm.com * modification, are permitted provided that the following conditions are 167584SAli.Saidi@arm.com * met: redistributions of source code must retain the above copyright 177584SAli.Saidi@arm.com * notice, this list of conditions and the following disclaimer; 187584SAli.Saidi@arm.com * redistributions in binary form must reproduce the above copyright 197584SAli.Saidi@arm.com * notice, this list of conditions and the following disclaimer in the 207584SAli.Saidi@arm.com * documentation and/or other materials provided with the distribution; 217584SAli.Saidi@arm.com * neither the name of the copyright holders nor the names of its 227584SAli.Saidi@arm.com * contributors may be used to endorse or promote products derived from 237584SAli.Saidi@arm.com * this software without specific prior written permission. 247584SAli.Saidi@arm.com * 257584SAli.Saidi@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 267584SAli.Saidi@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 277584SAli.Saidi@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 287584SAli.Saidi@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 297584SAli.Saidi@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 307584SAli.Saidi@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 317584SAli.Saidi@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 327584SAli.Saidi@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 337584SAli.Saidi@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 347584SAli.Saidi@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 357584SAli.Saidi@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 367584SAli.Saidi@arm.com * 377584SAli.Saidi@arm.com * Authors: Ali Saidi 387584SAli.Saidi@arm.com */ 397584SAli.Saidi@arm.com 407584SAli.Saidi@arm.com#ifndef __DEV_ARM_RV_HH__ 417584SAli.Saidi@arm.com#define __DEV_ARM_RV_HH__ 427584SAli.Saidi@arm.com 437950SAli.Saidi@ARM.com#include "base/bitunion.hh" 447584SAli.Saidi@arm.com#include "dev/io_device.hh" 457584SAli.Saidi@arm.com#include "params/RealViewCtrl.hh" 4611011SAndreas.Sandberg@ARM.com#include "params/RealViewOsc.hh" 4711421Sdavid.guillen@arm.com#include "params/RealViewTemperatureSensor.hh" 487584SAli.Saidi@arm.com 497584SAli.Saidi@arm.com/** @file 507584SAli.Saidi@arm.com * This implements the simple real view registers on a PBXA9 517584SAli.Saidi@arm.com */ 527584SAli.Saidi@arm.com 537584SAli.Saidi@arm.comclass RealViewCtrl : public BasicPioDevice 547584SAli.Saidi@arm.com{ 5511011SAndreas.Sandberg@ARM.com public: 5611011SAndreas.Sandberg@ARM.com enum DeviceFunc { 5711011SAndreas.Sandberg@ARM.com FUNC_OSC = 1, 5811011SAndreas.Sandberg@ARM.com FUNC_VOLT = 2, 5911011SAndreas.Sandberg@ARM.com FUNC_AMP = 3, 6011011SAndreas.Sandberg@ARM.com FUNC_TEMP = 4, 6111011SAndreas.Sandberg@ARM.com FUNC_RESET = 5, 6211011SAndreas.Sandberg@ARM.com FUNC_SCC = 6, 6311011SAndreas.Sandberg@ARM.com FUNC_MUXFPGA = 7, 6411011SAndreas.Sandberg@ARM.com FUNC_SHUTDOWN = 8, 6511011SAndreas.Sandberg@ARM.com FUNC_REBOOT = 9, 6611011SAndreas.Sandberg@ARM.com FUNC_DVIMODE = 11, 6711011SAndreas.Sandberg@ARM.com FUNC_POWER = 12, 6811011SAndreas.Sandberg@ARM.com FUNC_ENERGY = 13, 6911011SAndreas.Sandberg@ARM.com }; 7011011SAndreas.Sandberg@ARM.com 7111011SAndreas.Sandberg@ARM.com class Device 7211011SAndreas.Sandberg@ARM.com { 7311011SAndreas.Sandberg@ARM.com public: 7411011SAndreas.Sandberg@ARM.com Device(RealViewCtrl &parent, DeviceFunc func, 7511011SAndreas.Sandberg@ARM.com uint8_t site, uint8_t pos, uint8_t dcc, uint16_t dev) 7611011SAndreas.Sandberg@ARM.com { 7711011SAndreas.Sandberg@ARM.com parent.registerDevice(func, site, pos, dcc, dev, this); 7811011SAndreas.Sandberg@ARM.com } 7911011SAndreas.Sandberg@ARM.com 8011011SAndreas.Sandberg@ARM.com virtual ~Device() {} 8111011SAndreas.Sandberg@ARM.com 8211011SAndreas.Sandberg@ARM.com virtual uint32_t read() const = 0; 8311011SAndreas.Sandberg@ARM.com virtual void write(uint32_t value) = 0; 8411011SAndreas.Sandberg@ARM.com }; 8511011SAndreas.Sandberg@ARM.com 867584SAli.Saidi@arm.com protected: 877584SAli.Saidi@arm.com enum { 887584SAli.Saidi@arm.com IdReg = 0x00, 897584SAli.Saidi@arm.com SwReg = 0x04, 907584SAli.Saidi@arm.com Led = 0x08, 917584SAli.Saidi@arm.com Osc0 = 0x0C, 927584SAli.Saidi@arm.com Osc1 = 0x10, 937584SAli.Saidi@arm.com Osc2 = 0x14, 947584SAli.Saidi@arm.com Osc3 = 0x18, 957584SAli.Saidi@arm.com Osc4 = 0x1C, 967584SAli.Saidi@arm.com Lock = 0x20, 977584SAli.Saidi@arm.com Clock100 = 0x24, 987584SAli.Saidi@arm.com CfgData1 = 0x28, 997584SAli.Saidi@arm.com CfgData2 = 0x2C, 1007584SAli.Saidi@arm.com Flags = 0x30, 1017584SAli.Saidi@arm.com FlagsClr = 0x34, 1027584SAli.Saidi@arm.com NvFlags = 0x38, 1037584SAli.Saidi@arm.com NvFlagsClr = 0x3C, 1047584SAli.Saidi@arm.com ResetCtl = 0x40, 1057584SAli.Saidi@arm.com PciCtl = 0x44, 1067584SAli.Saidi@arm.com MciCtl = 0x48, 1077584SAli.Saidi@arm.com Flash = 0x4C, 1087584SAli.Saidi@arm.com Clcd = 0x50, 1097584SAli.Saidi@arm.com ClcdSer = 0x54, 1107584SAli.Saidi@arm.com Bootcs = 0x58, 1117584SAli.Saidi@arm.com Clock24 = 0x5C, 1127584SAli.Saidi@arm.com Misc = 0x60, 1137584SAli.Saidi@arm.com IoSel = 0x70, 1148524SAli.Saidi@ARM.com ProcId0 = 0x84, 1158524SAli.Saidi@ARM.com ProcId1 = 0x88, 1169958Smatt.evans@arm.com CfgData = 0xA0, 1179958Smatt.evans@arm.com CfgCtrl = 0xA4, 1188524SAli.Saidi@ARM.com CfgStat = 0xA8, 1197584SAli.Saidi@arm.com TestOsc0 = 0xC0, 1207584SAli.Saidi@arm.com TestOsc1 = 0xC4, 1217584SAli.Saidi@arm.com TestOsc2 = 0xC8, 1227584SAli.Saidi@arm.com TestOsc3 = 0xCC, 1237584SAli.Saidi@arm.com TestOsc4 = 0xD0 1247584SAli.Saidi@arm.com }; 1257584SAli.Saidi@arm.com 1267950SAli.Saidi@ARM.com // system lock value 1277950SAli.Saidi@ARM.com BitUnion32(SysLockReg) 1287950SAli.Saidi@ARM.com Bitfield<15,0> lockVal; 1297950SAli.Saidi@ARM.com Bitfield<16> locked; 1307950SAli.Saidi@ARM.com EndBitUnion(SysLockReg) 1317950SAli.Saidi@ARM.com 13211011SAndreas.Sandberg@ARM.com BitUnion32(CfgCtrlReg) 13311011SAndreas.Sandberg@ARM.com Bitfield<11, 0> dev; 13411011SAndreas.Sandberg@ARM.com Bitfield<15, 12> pos; 13511011SAndreas.Sandberg@ARM.com Bitfield<17, 16> site; 13611011SAndreas.Sandberg@ARM.com Bitfield<25, 20> func; 13711011SAndreas.Sandberg@ARM.com Bitfield<29, 26> dcc; 13811011SAndreas.Sandberg@ARM.com Bitfield<30> wr; 13911011SAndreas.Sandberg@ARM.com Bitfield<31> start; 14011011SAndreas.Sandberg@ARM.com EndBitUnion(CfgCtrlReg) 14111011SAndreas.Sandberg@ARM.com 14211011SAndreas.Sandberg@ARM.com static const uint32_t CFG_CTRL_ADDR_MASK = 0x3fffffffUL; 14311011SAndreas.Sandberg@ARM.com 1447950SAli.Saidi@ARM.com SysLockReg sysLock; 1457950SAli.Saidi@ARM.com 1468281SAli.Saidi@ARM.com /** This register is used for smp booting. 1478281SAli.Saidi@ARM.com * The primary cpu writes the secondary start address here before 1488281SAli.Saidi@ARM.com * sends it a soft interrupt. The secondary cpu reads this register and if 1498281SAli.Saidi@ARM.com * it's non-zero it jumps to the address 1508281SAli.Saidi@ARM.com */ 1518281SAli.Saidi@ARM.com uint32_t flags; 1528281SAli.Saidi@ARM.com 1539958Smatt.evans@arm.com /** This register contains the result from a system control reg access 1549958Smatt.evans@arm.com */ 1559958Smatt.evans@arm.com uint32_t scData; 1569958Smatt.evans@arm.com 1577584SAli.Saidi@arm.com public: 1587584SAli.Saidi@arm.com typedef RealViewCtrlParams Params; 1597584SAli.Saidi@arm.com const Params * 1607584SAli.Saidi@arm.com params() const 1617584SAli.Saidi@arm.com { 1627584SAli.Saidi@arm.com return dynamic_cast<const Params *>(_params); 1637584SAli.Saidi@arm.com } 1647584SAli.Saidi@arm.com /** 1657584SAli.Saidi@arm.com * The constructor for RealView just registers itself with the MMU. 1667584SAli.Saidi@arm.com * @param p params structure 1677584SAli.Saidi@arm.com */ 1687584SAli.Saidi@arm.com RealViewCtrl(Params *p); 1697584SAli.Saidi@arm.com 1707584SAli.Saidi@arm.com /** 1717584SAli.Saidi@arm.com * Handle a read to the device 1727584SAli.Saidi@arm.com * @param pkt The memory request. 1737584SAli.Saidi@arm.com * @param data Where to put the data. 1747584SAli.Saidi@arm.com */ 17511168Sandreas.hansson@arm.com Tick read(PacketPtr pkt) override; 1767584SAli.Saidi@arm.com 1777584SAli.Saidi@arm.com /** 1787584SAli.Saidi@arm.com * All writes are simply ignored. 1797584SAli.Saidi@arm.com * @param pkt The memory request. 1807584SAli.Saidi@arm.com * @param data the data 1817584SAli.Saidi@arm.com */ 18211168Sandreas.hansson@arm.com Tick write(PacketPtr pkt) override; 1837584SAli.Saidi@arm.com 18411168Sandreas.hansson@arm.com void serialize(CheckpointOut &cp) const override; 18511168Sandreas.hansson@arm.com void unserialize(CheckpointIn &cp) override; 18611011SAndreas.Sandberg@ARM.com 18711011SAndreas.Sandberg@ARM.com public: 18811011SAndreas.Sandberg@ARM.com void registerDevice(DeviceFunc func, uint8_t site, uint8_t pos, 18911011SAndreas.Sandberg@ARM.com uint8_t dcc, uint16_t dev, 19011011SAndreas.Sandberg@ARM.com Device *handler); 19111011SAndreas.Sandberg@ARM.com 19211011SAndreas.Sandberg@ARM.com protected: 19311011SAndreas.Sandberg@ARM.com std::map<uint32_t, Device *> devices; 1947584SAli.Saidi@arm.com}; 1957584SAli.Saidi@arm.com 19611011SAndreas.Sandberg@ARM.com/** 19711011SAndreas.Sandberg@ARM.com * This is an implementation of a programmable oscillator on the that 19811011SAndreas.Sandberg@ARM.com * can be configured through the RealView/Versatile Express 19911011SAndreas.Sandberg@ARM.com * configuration interface. 20011011SAndreas.Sandberg@ARM.com * 20111011SAndreas.Sandberg@ARM.com * See ARM DUI 0447J (ARM Motherboard Express uATX -- V2M-P1). 20211011SAndreas.Sandberg@ARM.com */ 20311011SAndreas.Sandberg@ARM.comclass RealViewOsc 20411011SAndreas.Sandberg@ARM.com : public ClockDomain, RealViewCtrl::Device 20511011SAndreas.Sandberg@ARM.com{ 20611011SAndreas.Sandberg@ARM.com public: 20711011SAndreas.Sandberg@ARM.com RealViewOsc(RealViewOscParams *p); 20811011SAndreas.Sandberg@ARM.com virtual ~RealViewOsc() {}; 20911011SAndreas.Sandberg@ARM.com 21011168Sandreas.hansson@arm.com void startup() override; 21111011SAndreas.Sandberg@ARM.com 21211168Sandreas.hansson@arm.com void serialize(CheckpointOut &cp) const override; 21311168Sandreas.hansson@arm.com void unserialize(CheckpointIn &cp) override; 21411011SAndreas.Sandberg@ARM.com 21511011SAndreas.Sandberg@ARM.com public: // RealViewCtrl::Device interface 21611168Sandreas.hansson@arm.com uint32_t read() const override; 21711168Sandreas.hansson@arm.com void write(uint32_t freq) override; 21811011SAndreas.Sandberg@ARM.com 21911011SAndreas.Sandberg@ARM.com protected: 22011011SAndreas.Sandberg@ARM.com void clockPeriod(Tick clock_period); 22111011SAndreas.Sandberg@ARM.com}; 22211011SAndreas.Sandberg@ARM.com 22311421Sdavid.guillen@arm.com/** 22411421Sdavid.guillen@arm.com * This device implements the temperature sensor used in the 22511421Sdavid.guillen@arm.com * RealView/Versatile Express platform. 22611421Sdavid.guillen@arm.com * 22711421Sdavid.guillen@arm.com * See ARM DUI 0447J (ARM Motherboard Express uATX -- V2M-P1). 22811421Sdavid.guillen@arm.com */ 22911421Sdavid.guillen@arm.comclass RealViewTemperatureSensor 23011421Sdavid.guillen@arm.com : public SimObject, RealViewCtrl::Device 23111421Sdavid.guillen@arm.com{ 23211421Sdavid.guillen@arm.com public: 23311421Sdavid.guillen@arm.com RealViewTemperatureSensor(RealViewTemperatureSensorParams *p) 23411421Sdavid.guillen@arm.com : SimObject(p), 23511421Sdavid.guillen@arm.com RealViewCtrl::Device(*p->parent, RealViewCtrl::FUNC_TEMP, 23611421Sdavid.guillen@arm.com p->site, p->position, p->dcc, p->device), 23711421Sdavid.guillen@arm.com system(p->system) 23811421Sdavid.guillen@arm.com {} 23911421Sdavid.guillen@arm.com virtual ~RealViewTemperatureSensor() {}; 24011421Sdavid.guillen@arm.com 24111421Sdavid.guillen@arm.com public: // RealViewCtrl::Device interface 24211421Sdavid.guillen@arm.com uint32_t read() const override; 24311421Sdavid.guillen@arm.com void write(uint32_t temp) override {} 24411421Sdavid.guillen@arm.com 24511421Sdavid.guillen@arm.com protected: 24611421Sdavid.guillen@arm.com /** The system this RV device belongs to */ 24711421Sdavid.guillen@arm.com System * system; 24811421Sdavid.guillen@arm.com}; 24911421Sdavid.guillen@arm.com 2507584SAli.Saidi@arm.com 2517584SAli.Saidi@arm.com#endif // __DEV_ARM_RV_HH__ 252