rtc_pl031.hh revision 9235:5aa4896ed55a
16019Shines@cs.fsu.edu/* 26019Shines@cs.fsu.edu * Copyright (c) 2010-2012 ARM Limited 37100Sgblack@eecs.umich.edu * All rights reserved 47100Sgblack@eecs.umich.edu * 57100Sgblack@eecs.umich.edu * The license below extends only to copyright in the software and shall 67100Sgblack@eecs.umich.edu * not be construed as granting a license to any other intellectual 77100Sgblack@eecs.umich.edu * property including but not limited to intellectual property relating 87100Sgblack@eecs.umich.edu * to a hardware implementation of the functionality of the software 97100Sgblack@eecs.umich.edu * licensed hereunder. You may use the software subject to the license 107100Sgblack@eecs.umich.edu * terms below provided that you ensure that this notice is replicated 117100Sgblack@eecs.umich.edu * unmodified and in its entirety in all distributions of the software, 127100Sgblack@eecs.umich.edu * modified or unmodified, in source code or in binary form. 137100Sgblack@eecs.umich.edu * 147100Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 156019Shines@cs.fsu.edu * modification, are permitted provided that the following conditions are 166019Shines@cs.fsu.edu * met: redistributions of source code must retain the above copyright 176019Shines@cs.fsu.edu * notice, this list of conditions and the following disclaimer; 186019Shines@cs.fsu.edu * redistributions in binary form must reproduce the above copyright 196019Shines@cs.fsu.edu * notice, this list of conditions and the following disclaimer in the 206019Shines@cs.fsu.edu * documentation and/or other materials provided with the distribution; 216019Shines@cs.fsu.edu * neither the name of the copyright holders nor the names of its 226019Shines@cs.fsu.edu * contributors may be used to endorse or promote products derived from 236019Shines@cs.fsu.edu * this software without specific prior written permission. 246019Shines@cs.fsu.edu * 256019Shines@cs.fsu.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 266019Shines@cs.fsu.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 276019Shines@cs.fsu.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 286019Shines@cs.fsu.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 296019Shines@cs.fsu.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 306019Shines@cs.fsu.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 316019Shines@cs.fsu.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 326019Shines@cs.fsu.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 336019Shines@cs.fsu.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 346019Shines@cs.fsu.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 356019Shines@cs.fsu.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 366019Shines@cs.fsu.edu * 376019Shines@cs.fsu.edu * Authors: Ali Saidi 386019Shines@cs.fsu.edu */ 396019Shines@cs.fsu.edu 406019Shines@cs.fsu.edu#ifndef __DEV_ARM_RTC_PL310_HH__ 416019Shines@cs.fsu.edu#define __DEV_ARM_RTC_PL310_HH__ 426757SAli.Saidi@ARM.com 436019Shines@cs.fsu.edu#include "dev/arm/amba_device.hh" 446019Shines@cs.fsu.edu#include "params/PL031.hh" 456019Shines@cs.fsu.edu 466019Shines@cs.fsu.edu/** @file 476019Shines@cs.fsu.edu * This implements the ARM Primecell 031 RTC 486019Shines@cs.fsu.edu */ 496019Shines@cs.fsu.edu 506019Shines@cs.fsu.educlass PL031 : public AmbaIntDevice 517170Sgblack@eecs.umich.edu{ 526253Sgblack@eecs.umich.edu protected: 537202Sgblack@eecs.umich.edu enum { 546253Sgblack@eecs.umich.edu DataReg = 0x00, 556253Sgblack@eecs.umich.edu MatchReg = 0x04, 567396Sgblack@eecs.umich.edu LoadReg = 0x08, 578745Sgblack@eecs.umich.edu ControlReg = 0x0C, 587405SAli.Saidi@ARM.com IntMask = 0x10, 598782Sgblack@eecs.umich.edu RawISR = 0x14, 608782Sgblack@eecs.umich.edu MaskedISR = 0x18, 618782Sgblack@eecs.umich.edu IntClear = 0x1C, 627259Sgblack@eecs.umich.edu }; 638757Sgblack@eecs.umich.edu 647423Sgblack@eecs.umich.edu /* Seconds since epoch that correspond to time simulation was started at the 658782Sgblack@eecs.umich.edu * begining of simulation and is then updated if ever written. */ 668757Sgblack@eecs.umich.edu uint32_t timeVal; 678777Sgblack@eecs.umich.edu 688782Sgblack@eecs.umich.edu /* Time when the timeVal register was written */ 698756Sgblack@eecs.umich.edu Tick lastWrittenTick; 706019Shines@cs.fsu.edu 716757SAli.Saidi@ARM.com /* Previous load value */ 728757Sgblack@eecs.umich.edu uint32_t loadVal; 736019Shines@cs.fsu.edu 748745Sgblack@eecs.umich.edu /* RTC Match Value 756397Sgblack@eecs.umich.edu * Cause an interrupt when this value hits counter 768782Sgblack@eecs.umich.edu */ 776019Shines@cs.fsu.edu uint32_t matchVal; 786397Sgblack@eecs.umich.edu 798335Snate@binkert.org /** If timer has caused an interrupt. This is irrespective of 808335Snate@binkert.org * interrupt enable */ 818335Snate@binkert.org bool rawInt; 828335Snate@binkert.org 836019Shines@cs.fsu.edu /** If the timer interrupt mask that is anded with the raw interrupt to 846019Shines@cs.fsu.edu * generate a pending interrupt 856019Shines@cs.fsu.edu */ 866019Shines@cs.fsu.edu bool maskInt; 876019Shines@cs.fsu.edu 886019Shines@cs.fsu.edu /** If an interrupt is currently pending. Logical and of CTRL.intEnable 896019Shines@cs.fsu.edu * and rawInt */ 906019Shines@cs.fsu.edu bool pendingInt; 91 92 /** Called when the counter reaches matches */ 93 void counterMatch(); 94 EventWrapper<PL031, &PL031::counterMatch> matchEvent; 95 96 /** Called to update the matchEvent when the load Value or match value are 97 * written. 98 */ 99 void resyncMatch(); 100 101 public: 102 typedef PL031Params Params; 103 const Params * 104 params() const 105 { 106 return dynamic_cast<const Params *>(_params); 107 } 108 /** 109 * The constructor for RealView just registers itself with the MMU. 110 * @param p params structure 111 */ 112 PL031(Params *p); 113 114 /** 115 * Handle a read to the device 116 * @param pkt The memory request. 117 * @param data Where to put the data. 118 */ 119 virtual Tick read(PacketPtr pkt); 120 121 /** 122 * Handle writes to the device 123 * @param pkt The memory request. 124 * @param data the data 125 */ 126 virtual Tick write(PacketPtr pkt); 127 128 129 virtual void serialize(std::ostream &os); 130 virtual void unserialize(Checkpoint *cp, const std::string §ion); 131}; 132 133 134#endif // __DEV_ARM_RTC_PL031_HH__ 135 136