realview.hh revision 7584
13630SN/A/* 27090SN/A * Copyright (c) 2009 ARM Limited 37090SN/A * All rights reserved 47090SN/A * 57090SN/A * The license below extends only to copyright in the software and shall 67090SN/A * not be construed as granting a license to any other intellectual 77090SN/A * property including but not limited to intellectual property relating 87090SN/A * to a hardware implementation of the functionality of the software 97090SN/A * licensed hereunder. You may use the software subject to the license 107090SN/A * terms below provided that you ensure that this notice is replicated 117090SN/A * unmodified and in its entirety in all distributions of the software, 127090SN/A * modified or unmodified, in source code or in binary form. 137090SN/A * 143630SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan 153630SN/A * All rights reserved. 163630SN/A * 173630SN/A * Redistribution and use in source and binary forms, with or without 183630SN/A * modification, are permitted provided that the following conditions are 193630SN/A * met: redistributions of source code must retain the above copyright 203630SN/A * notice, this list of conditions and the following disclaimer; 213630SN/A * redistributions in binary form must reproduce the above copyright 223630SN/A * notice, this list of conditions and the following disclaimer in the 233630SN/A * documentation and/or other materials provided with the distribution; 243630SN/A * neither the name of the copyright holders nor the names of its 253630SN/A * contributors may be used to endorse or promote products derived from 263630SN/A * this software without specific prior written permission. 273630SN/A * 283630SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 293630SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 303630SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 313630SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 323630SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 333630SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 343630SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 353630SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 363630SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 373630SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 383630SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 393630SN/A * 403630SN/A * Authors: Ali Saidi 413630SN/A */ 423630SN/A 433630SN/A/** 443630SN/A * @file 457584SAli.Saidi@arm.com * Declaration of top level class for the RealView platform chips. This class just 463630SN/A * retains pointers to all its children so the children can communicate. 473630SN/A */ 483630SN/A 497584SAli.Saidi@arm.com#ifndef __DEV_ARM_RealView_HH__ 507584SAli.Saidi@arm.com#define __DEV_ARM_RealView_HH__ 513630SN/A 523630SN/A#include "dev/platform.hh" 537584SAli.Saidi@arm.com#include "params/RealView.hh" 543630SN/A 553630SN/Aclass IdeController; 563630SN/Aclass System; 573630SN/A 587584SAli.Saidi@arm.comclass RealView : public Platform 593630SN/A{ 603630SN/A public: 613630SN/A /** Pointer to the system */ 623630SN/A System *system; 633630SN/A 643630SN/A public: 657584SAli.Saidi@arm.com typedef RealViewParams Params; 663630SN/A /** 673630SN/A * Constructor for the Tsunami Class. 683630SN/A * @param name name of the object 693630SN/A * @param s system the object belongs to 703630SN/A * @param intctrl pointer to the interrupt controller 713630SN/A */ 727584SAli.Saidi@arm.com RealView(const Params *p); 733630SN/A 743630SN/A /** 753630SN/A * Return the interrupting frequency to AlphaAccess 763630SN/A * @return frequency of RTC interrupts 773630SN/A */ 783630SN/A virtual Tick intrFrequency(); 793630SN/A 803630SN/A /** 813630SN/A * Cause the cpu to post a serial interrupt to the CPU. 823630SN/A */ 833630SN/A virtual void postConsoleInt(); 843630SN/A 853630SN/A /** 863812SN/A * Clear a posted CPU interrupt 873630SN/A */ 883630SN/A virtual void clearConsoleInt(); 893630SN/A 903630SN/A /** 913630SN/A * Cause the chipset to post a cpi interrupt to the CPU. 923630SN/A */ 933630SN/A virtual void postPciInt(int line); 943630SN/A 953630SN/A /** 963630SN/A * Clear a posted PCI->CPU interrupt 973630SN/A */ 983630SN/A virtual void clearPciInt(int line); 993630SN/A 1003630SN/A 1013630SN/A virtual Addr pciToDma(Addr pciAddr) const; 1023630SN/A 1033630SN/A /** 1043630SN/A * Calculate the configuration address given a bus/dev/func. 1053630SN/A */ 1065834SN/A virtual Addr calcPciConfigAddr(int bus, int dev, int func); 1075834SN/A 1085834SN/A /** 1095834SN/A * Calculate the address for an IO location on the PCI bus. 1105834SN/A */ 1115834SN/A virtual Addr calcPciIOAddr(Addr addr); 1125834SN/A 1135834SN/A /** 1145834SN/A * Calculate the address for a memory location on the PCI bus. 1155834SN/A */ 1165834SN/A virtual Addr calcPciMemAddr(Addr addr); 1173630SN/A}; 1183630SN/A 1197584SAli.Saidi@arm.com#endif // __DEV_ARM_RealView_HH__ 120