pl111.hh revision 9525:0587c8983d47 
1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: William Wang
38 *          Ali Saidi
39 */
40
41
42/** @file
43 * Implementiation of a PL111 CLCD controller
44 */
45
46#ifndef __DEV_ARM_PL111_HH__
47#define __DEV_ARM_PL111_HH__
48
49#include <fstream>
50
51#include "dev/arm/amba_device.hh"
52#include "params/Pl111.hh"
53#include "sim/serialize.hh"
54
55class VncInput;
56class Bitmap;
57
58class Pl111: public AmbaDmaDevice
59{
60  protected:
61    static const uint64_t AMBA_ID       = ULL(0xb105f00d00141111);
62    /** ARM PL111 register map*/
63    static const int LcdTiming0       = 0x000;
64    static const int LcdTiming1       = 0x004;
65    static const int LcdTiming2       = 0x008;
66    static const int LcdTiming3       = 0x00C;
67    static const int LcdUpBase        = 0x010;
68    static const int LcdLpBase        = 0x014;
69    static const int LcdControl       = 0x018;
70    static const int LcdImsc          = 0x01C;
71    static const int LcdRis           = 0x020;
72    static const int LcdMis           = 0x024;
73    static const int LcdIcr           = 0x028;
74    static const int LcdUpCurr        = 0x02C;
75    static const int LcdLpCurr        = 0x030;
76    static const int LcdPalette       = 0x200;
77    static const int CrsrImage        = 0x800;
78    static const int ClcdCrsrCtrl     = 0xC00;
79    static const int ClcdCrsrConfig   = 0xC04;
80    static const int ClcdCrsrPalette0 = 0xC08;
81    static const int ClcdCrsrPalette1 = 0xC0C;
82    static const int ClcdCrsrXY       = 0xC10;
83    static const int ClcdCrsrClip     = 0xC14;
84    static const int ClcdCrsrImsc     = 0xC20;
85    static const int ClcdCrsrIcr      = 0xC24;
86    static const int ClcdCrsrRis      = 0xC28;
87    static const int ClcdCrsrMis      = 0xC2C;
88
89    static const int LcdPaletteSize   = 128;
90    static const int CrsrImageSize    = 256;
91
92    static const int LcdMaxWidth      = 1024; // pixels per line
93    static const int LcdMaxHeight     = 768;  // lines per panel
94
95    static const int dmaSize            = 8;    // 64 bits
96    static const int maxOutstandingDma  = 16;   // 16 deep FIFO of 64 bits
97
98    static const int buffer_size = LcdMaxWidth * LcdMaxHeight * sizeof(uint32_t);
99
100    enum LcdMode {
101        bpp1 = 0,
102        bpp2,
103        bpp4,
104        bpp8,
105        bpp16,
106        bpp24,
107        bpp16m565,
108        bpp12
109    };
110
111    BitUnion8(InterruptReg)
112        Bitfield<1> underflow;
113        Bitfield<2> baseaddr;
114        Bitfield<3> vcomp;
115        Bitfield<4> ahbmaster;
116    EndBitUnion(InterruptReg)
117
118    BitUnion32(TimingReg0)
119        Bitfield<7,2> ppl;
120        Bitfield<15,8> hsw;
121        Bitfield<23,16> hfp;
122        Bitfield<31,24> hbp;
123    EndBitUnion(TimingReg0)
124
125    BitUnion32(TimingReg1)
126        Bitfield<9,0> lpp;
127        Bitfield<15,10> vsw;
128        Bitfield<23,16> vfp;
129        Bitfield<31,24> vbp;
130    EndBitUnion(TimingReg1)
131
132    BitUnion32(TimingReg2)
133        Bitfield<4,0> pcdlo;
134        Bitfield<5> clksel;
135        Bitfield<10,6> acb;
136        Bitfield<11> avs;
137        Bitfield<12> ihs;
138        Bitfield<13> ipc;
139        Bitfield<14> ioe;
140        Bitfield<25,16> cpl;
141        Bitfield<26> bcd;
142        Bitfield<31,27> pcdhi;
143    EndBitUnion(TimingReg2)
144
145    BitUnion32(TimingReg3)
146        Bitfield<6,0> led;
147        Bitfield<16> lee;
148    EndBitUnion(TimingReg3)
149
150    BitUnion32(ControlReg)
151        Bitfield<0> lcden;
152        Bitfield<3,1> lcdbpp;
153        Bitfield<4> lcdbw;
154        Bitfield<5> lcdtft;
155        Bitfield<6> lcdmono8;
156        Bitfield<7> lcddual;
157        Bitfield<8> bgr;
158        Bitfield<9> bebo;
159        Bitfield<10> bepo;
160        Bitfield<11> lcdpwr;
161        Bitfield<13,12> lcdvcomp;
162        Bitfield<16> watermark;
163    EndBitUnion(ControlReg)
164
165    /**
166     * Event wrapper for dmaDone()
167     *
168     * This event calls pushes its this pointer onto the freeDoneEvent
169     * vector and calls dmaDone() when triggered.
170     */
171    class DmaDoneEvent : public Event
172    {
173      private:
174        Pl111 &obj;
175
176      public:
177        DmaDoneEvent(Pl111 *_obj)
178            : Event(), obj(*_obj) {}
179
180        void process() {
181            obj.dmaDoneEventFree.push_back(this);
182            obj.dmaDone();
183        }
184
185        const std::string name() const {
186            return obj.name() + ".DmaDoneEvent";
187        }
188    };
189
190    /** Horizontal axis panel control register */
191    TimingReg0 lcdTiming0;
192
193    /** Vertical axis panel control register */
194    TimingReg1 lcdTiming1;
195
196    /** Clock and signal polarity control register */
197    TimingReg2 lcdTiming2;
198
199    /** Line end control register */
200    TimingReg3 lcdTiming3;
201
202    /** Upper panel frame base address register */
203    int lcdUpbase;
204
205    /** Lower panel frame base address register */
206    int lcdLpbase;
207
208    /** Control register */
209    ControlReg lcdControl;
210
211    /** Interrupt mask set/clear register */
212    InterruptReg lcdImsc;
213
214    /** Raw interrupt status register - const */
215    InterruptReg lcdRis;
216
217    /** Masked interrupt status register */
218    InterruptReg lcdMis;
219
220    /** 256x16-bit color palette registers
221     * 256 palette entries organized as 128 locations of two entries per word */
222    int lcdPalette[LcdPaletteSize];
223
224    /** Cursor image RAM register
225     * 256-word wide values defining images overlaid by the hw cursor mechanism */
226    int cursorImage[CrsrImageSize];
227
228    /** Cursor control register */
229    int clcdCrsrCtrl;
230
231    /** Cursor configuration register */
232    int clcdCrsrConfig;
233
234    /** Cursor palette registers */
235    int clcdCrsrPalette0;
236    int clcdCrsrPalette1;
237
238    /** Cursor XY position register */
239    int clcdCrsrXY;
240
241    /** Cursor clip position register */
242    int clcdCrsrClip;
243
244    /** Cursor interrupt mask set/clear register */
245    InterruptReg clcdCrsrImsc;
246
247    /** Cursor interrupt clear register */
248    InterruptReg clcdCrsrIcr;
249
250    /** Cursor raw interrupt status register - const */
251    InterruptReg clcdCrsrRis;
252
253    /** Cursor masked interrupt status register - const */
254    InterruptReg clcdCrsrMis;
255
256    /** Pixel clock */
257    Tick pixelClock;
258
259    /** VNC server */
260    VncInput *vnc;
261
262    /** Helper to write out bitmaps */
263    Bitmap *bmp;
264
265    /** Picture of what the current frame buffer looks like */
266    std::ostream *pic;
267
268    /** Frame buffer width - pixels per line */
269    uint16_t width;
270
271    /** Frame buffer height - lines per panel */
272    uint16_t height;
273
274    /** Bytes per pixel */
275    uint8_t bytesPerPixel;
276
277    /** CLCDC supports up to 1024x768 */
278    uint8_t *dmaBuffer;
279
280    /** Start time for frame buffer dma read */
281    Tick startTime;
282
283    /** Frame buffer base address */
284    Addr startAddr;
285
286    /** Frame buffer max address */
287    Addr maxAddr;
288
289    /** Frame buffer current address */
290    Addr curAddr;
291
292    /** DMA FIFO watermark */
293    int waterMark;
294
295    /** Number of pending dma reads */
296    int dmaPendingNum;
297
298    /** Send updated parameters to the vnc server */
299    void updateVideoParams();
300
301    /** DMA framebuffer read */
302    void readFramebuffer();
303
304    /** Generate dma framebuffer read event */
305    void generateReadEvent();
306
307    /** Function to generate interrupt */
308    void generateInterrupt();
309
310    /** fillFIFO event */
311    void fillFifo();
312
313    /** start the dmas off after power is enabled */
314    void startDma();
315
316    /** DMA done event */
317    void dmaDone();
318
319    /** DMA framebuffer read event */
320    EventWrapper<Pl111, &Pl111::readFramebuffer> readEvent;
321
322    /** Fill fifo */
323    EventWrapper<Pl111, &Pl111::fillFifo> fillFifoEvent;
324
325    /**@{*/
326    /**
327     * All pre-allocated DMA done events
328     *
329     * The PL111 model preallocates maxOutstandingDma number of
330     * DmaDoneEvents to avoid having to heap allocate every single
331     * event when it is needed. In order to keep track of which events
332     * are in flight and which are ready to be used, we use two
333     * different vectors. dmaDoneEventAll contains <i>all</i>
334     * DmaDoneEvents that the object may use, while dmaDoneEventFree
335     * contains a list of currently <i>unused</i> events. When an
336     * event needs to be scheduled, the last element of the
337     * dmaDoneEventFree is used and removed from the list. When an
338     * event fires, it is added to the end of the
339     * dmaEventFreeList. dmaDoneEventAll is never used except for in
340     * initialization and serialization.
341     */
342    std::vector<DmaDoneEvent> dmaDoneEventAll;
343
344    /** Unused DMA done events that are ready to be scheduled */
345    std::vector<DmaDoneEvent *> dmaDoneEventFree;
346    /**@}*/
347
348    /** Wrapper to create an event out of the interrupt */
349    EventWrapper<Pl111, &Pl111::generateInterrupt> intEvent;
350
351  public:
352    typedef Pl111Params Params;
353
354    const Params *
355    params() const
356    {
357        return dynamic_cast<const Params *>(_params);
358    }
359    Pl111(const Params *p);
360    ~Pl111();
361
362    virtual Tick read(PacketPtr pkt);
363    virtual Tick write(PacketPtr pkt);
364
365    virtual void serialize(std::ostream &os);
366    virtual void unserialize(Checkpoint *cp, const std::string &section);
367
368    /**
369     * Determine the address ranges that this device responds to.
370     *
371     * @return a list of non-overlapping address ranges
372     */
373    AddrRangeList getAddrRanges() const;
374};
375
376#endif
377