pl111.cc revision 13230:2988dc5d1d6f
12SN/A/*
22188SN/A * Copyright (c) 2010-2012, 2015 ARM Limited
32SN/A * All rights reserved
42SN/A *
52SN/A * The license below extends only to copyright in the software and shall
62SN/A * not be construed as granting a license to any other intellectual
72SN/A * property including but not limited to intellectual property relating
82SN/A * to a hardware implementation of the functionality of the software
92SN/A * licensed hereunder.  You may use the software subject to the license
102SN/A * terms below provided that you ensure that this notice is replicated
112SN/A * unmodified and in its entirety in all distributions of the software,
122SN/A * modified or unmodified, in source code or in binary form.
132SN/A *
142SN/A * Redistribution and use in source and binary forms, with or without
152SN/A * modification, are permitted provided that the following conditions are
162SN/A * met: redistributions of source code must retain the above copyright
172SN/A * notice, this list of conditions and the following disclaimer;
182SN/A * redistributions in binary form must reproduce the above copyright
192SN/A * notice, this list of conditions and the following disclaimer in the
202SN/A * documentation and/or other materials provided with the distribution;
212SN/A * neither the name of the copyright holders nor the names of its
222SN/A * contributors may be used to endorse or promote products derived from
232SN/A * this software without specific prior written permission.
242SN/A *
252SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
262SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
272665SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
282665SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
292665SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
302665SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
312665SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
322SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
332SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
342SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
352SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
362465SN/A *
371717SN/A * Authors: William Wang
382683Sktlim@umich.edu *          Ali Saidi
392680SN/A */
405529Snate@binkert.org
412SN/A#include "dev/arm/pl111.hh"
421858SN/A
433565Sgblack@eecs.umich.edu#include "base/output.hh"
445529Snate@binkert.org#include "base/trace.hh"
451917SN/A#include "base/vnc/vncinput.hh"
461070SN/A#include "debug/PL111.hh"
471917SN/A#include "debug/Uart.hh"
482188SN/A#include "dev/arm/amba_device.hh"
491917SN/A#include "dev/arm/base_gic.hh"
502290SN/A#include "mem/packet.hh"
511070SN/A#include "mem/packet_access.hh"
521917SN/A#include "sim/system.hh"
532SN/A
545529Snate@binkert.org// clang complains about std::set being overloaded with Packet::set if
55360SN/A// we open up the entire namespace std
562519SN/Ausing std::vector;
572SN/A
582SN/A// initialize clcd registers
592SN/APl111::Pl111(const Params *p)
602SN/A    : AmbaDmaDevice(p), lcdTiming0(0), lcdTiming1(0), lcdTiming2(0),
612SN/A      lcdTiming3(0), lcdUpbase(0), lcdLpbase(0), lcdControl(0), lcdImsc(0),
621858SN/A      lcdRis(0), lcdMis(0),
632683Sktlim@umich.edu      clcdCrsrCtrl(0), clcdCrsrConfig(0), clcdCrsrPalette0(0),
643453Sgblack@eecs.umich.edu      clcdCrsrPalette1(0), clcdCrsrXY(0), clcdCrsrClip(0), clcdCrsrImsc(0),
652683Sktlim@umich.edu      clcdCrsrIcr(0), clcdCrsrRis(0), clcdCrsrMis(0),
665712Shsul@eecs.umich.edu      pixelClock(p->pixel_clock),
672683Sktlim@umich.edu      converter(PixelConverter::rgba8888_le), fb(LcdMaxWidth, LcdMaxHeight),
682521SN/A      vnc(p->vnc), bmp(&fb), pic(NULL),
692SN/A      width(LcdMaxWidth), height(LcdMaxHeight),
702683Sktlim@umich.edu      bytesPerPixel(4), startTime(0), startAddr(0), maxAddr(0), curAddr(0),
712190SN/A      waterMark(0), dmaPendingNum(0),
722680SN/A      readEvent([this]{ readFramebuffer(); }, name()),
732290SN/A      fillFifoEvent([this]{ fillFifo(); }, name()),
742526SN/A      dmaDoneEventAll(maxOutstandingDma, this),
751917SN/A      dmaDoneEventFree(maxOutstandingDma),
765529Snate@binkert.org      intEvent([this]{ generateInterrupt(); }, name()),
771982SN/A      enableCapture(p->enable_capture)
781917SN/A{
792683Sktlim@umich.edu    pioSize = 0xFFFF;
802683Sktlim@umich.edu
811917SN/A    dmaBuffer = new uint8_t[buffer_size];
821917SN/A
831917SN/A    memset(lcdPalette, 0, sizeof(lcdPalette));
841917SN/A    memset(cursorImage, 0, sizeof(cursorImage));
851917SN/A    memset(dmaBuffer, 0, buffer_size);
861917SN/A
871917SN/A    for (int i = 0; i < maxOutstandingDma; ++i)
881917SN/A        dmaDoneEventFree[i] = &dmaDoneEventAll[i];
892521SN/A
905482Snate@binkert.org    if (vnc)
913548Sgblack@eecs.umich.edu        vnc->setFrameBuffer(&fb);
922SN/A}
932SN/A
944997Sgblack@eecs.umich.eduPl111::~Pl111()
954997Sgblack@eecs.umich.edu{
965712Shsul@eecs.umich.edu    delete[] dmaBuffer;
974997Sgblack@eecs.umich.edu}
982SN/A
992526SN/A// read registers and frame buffer
1002683Sktlim@umich.eduTick
1012SN/APl111::read(PacketPtr pkt)
1022190SN/A{
1032862Sktlim@umich.edu    // use a temporary data since the LCD registers are read/written with
1042862Sktlim@umich.edu    // different size operations
1052864Sktlim@umich.edu
1062862Sktlim@umich.edu    uint32_t data = 0;
1075712Shsul@eecs.umich.edu
1082862Sktlim@umich.edu    assert(pkt->getAddr() >= pioAddr &&
1095712Shsul@eecs.umich.edu           pkt->getAddr() < pioAddr + pioSize);
1102862Sktlim@umich.edu
1112190SN/A    Addr daddr = pkt->getAddr() - pioAddr;
1122683Sktlim@umich.edu
1132862Sktlim@umich.edu    DPRINTF(PL111, " read register %#x size=%d\n", daddr, pkt->getSize());
1142190SN/A
1152190SN/A    switch (daddr) {
1162683Sktlim@umich.edu      case LcdTiming0:
1171070SN/A        data = lcdTiming0;
1183486Sktlim@umich.edu        break;
1193486Sktlim@umich.edu      case LcdTiming1:
1203486Sktlim@umich.edu        data = lcdTiming1;
1213486Sktlim@umich.edu        break;
1222680SN/A      case LcdTiming2:
1231070SN/A        data = lcdTiming2;
1241070SN/A        break;
1251917SN/A      case LcdTiming3:
1262683Sktlim@umich.edu        data = lcdTiming3;
127180SN/A        break;
128180SN/A      case LcdUpBase:
1291858SN/A        data = lcdUpbase;
1302235SN/A        break;
131180SN/A      case LcdLpBase:
1322235SN/A        data = lcdLpbase;
133180SN/A        break;
134180SN/A      case LcdControl:
1352862Sktlim@umich.edu        data = lcdControl;
1362862Sktlim@umich.edu        break;
1372313SN/A      case LcdImsc:
1382313SN/A        data = lcdImsc;
1392680SN/A        break;
1402313SN/A      case LcdRis:
1412680SN/A        data = lcdRis;
1422313SN/A        break;
1432313SN/A      case LcdMis:
1442680SN/A        data = lcdMis;
1452313SN/A        break;
1462361SN/A      case LcdIcr:
1473548Sgblack@eecs.umich.edu        panic("LCD register at offset %#x is Write-Only\n", daddr);
1482361SN/A        break;
1492361SN/A      case LcdUpCurr:
1502361SN/A        data = curAddr;
1512235SN/A        break;
152180SN/A      case LcdLpCurr:
153180SN/A        data = curAddr;
154180SN/A        break;
1552680SN/A      case ClcdCrsrCtrl:
156180SN/A        data = clcdCrsrCtrl;
157180SN/A        break;
1582SN/A      case ClcdCrsrConfig:
1592864Sktlim@umich.edu        data = clcdCrsrConfig;
1602864Sktlim@umich.edu        break;
1612864Sktlim@umich.edu      case ClcdCrsrPalette0:
1622864Sktlim@umich.edu        data = clcdCrsrPalette0;
1632864Sktlim@umich.edu        break;
1642864Sktlim@umich.edu      case ClcdCrsrPalette1:
1652864Sktlim@umich.edu        data = clcdCrsrPalette1;
1662864Sktlim@umich.edu        break;
1672864Sktlim@umich.edu      case ClcdCrsrXY:
1683548Sgblack@eecs.umich.edu        data = clcdCrsrXY;
1692864Sktlim@umich.edu        break;
1702864Sktlim@umich.edu      case ClcdCrsrClip:
1712864Sktlim@umich.edu        data = clcdCrsrClip;
1722864Sktlim@umich.edu        break;
1732864Sktlim@umich.edu      case ClcdCrsrImsc:
1742864Sktlim@umich.edu        data = clcdCrsrImsc;
1752864Sktlim@umich.edu        break;
1762862Sktlim@umich.edu      case ClcdCrsrIcr:
1772862Sktlim@umich.edu        panic("CLCD register at offset %#x is Write-Only\n", daddr);
1782862Sktlim@umich.edu        break;
1792862Sktlim@umich.edu      case ClcdCrsrRis:
1802862Sktlim@umich.edu        data = clcdCrsrRis;
1812862Sktlim@umich.edu        break;
1822862Sktlim@umich.edu      case ClcdCrsrMis:
1832862Sktlim@umich.edu        data = clcdCrsrMis;
1842915Sktlim@umich.edu        break;
1855714Shsul@eecs.umich.edu      default:
1865715Shsul@eecs.umich.edu        if (readId(pkt, AMBA_ID, pioAddr)) {
1875714Shsul@eecs.umich.edu            // Hack for variable size accesses
1882862Sktlim@umich.edu            data = pkt->getLE<uint32_t>();
1892862Sktlim@umich.edu            break;
1902862Sktlim@umich.edu        } else if (daddr >= CrsrImage && daddr <= 0xBFC) {
1912683Sktlim@umich.edu            // CURSOR IMAGE
192217SN/A            int index;
1932862Sktlim@umich.edu            index = (daddr - CrsrImage) >> 2;
1945606Snate@binkert.org            data= cursorImage[index];
195223SN/A            break;
196217SN/A        } else if (daddr >= LcdPalette && daddr <= 0x3FC) {
197217SN/A            // LCD Palette
198217SN/A            int index;
199217SN/A            index = (daddr - LcdPalette) >> 2;
2002683Sktlim@umich.edu            data = lcdPalette[index];
201217SN/A            break;
2022862Sktlim@umich.edu        } else {
2035606Snate@binkert.org            panic("Tried to read CLCD register at offset %#x that "
204223SN/A                       "doesn't exist\n", daddr);
205217SN/A            break;
206217SN/A        }
2072683Sktlim@umich.edu    }
2082683Sktlim@umich.edu
2092683Sktlim@umich.edu    switch(pkt->getSize()) {
2102683Sktlim@umich.edu      case 1:
2112683Sktlim@umich.edu        pkt->setLE<uint8_t>(data);
2122683Sktlim@umich.edu        break;
2132683Sktlim@umich.edu      case 2:
2142683Sktlim@umich.edu        pkt->setLE<uint16_t>(data);
215217SN/A        break;
216217SN/A      case 4:
2172683Sktlim@umich.edu        pkt->setLE<uint32_t>(data);
2182SN/A        break;
2192680SN/A      default:
2202SN/A        panic("CLCD controller read size too big?\n");
2212SN/A        break;
2222188SN/A    }
2232188SN/A
2244400Srdreslin@umich.edu    pkt->makeAtomicResponse();
2255715Shsul@eecs.umich.edu    return pioDelay;
2265543Ssaidi@eecs.umich.edu}
2274400Srdreslin@umich.edu
2282290SN/A// write registers and frame buffer
2292680SN/ATick
2302290SN/APl111::write(PacketPtr pkt)
2312290SN/A{
2325715Shsul@eecs.umich.edu    // use a temporary data since the LCD registers are read/written with
233393SN/A    // different size operations
234393SN/A    //
235393SN/A    uint32_t data = 0;
2362683Sktlim@umich.edu
237393SN/A    switch(pkt->getSize()) {
2382680SN/A      case 1:
239393SN/A        data = pkt->getLE<uint8_t>();
240393SN/A        break;
2412188SN/A      case 2:
2422188SN/A        data = pkt->getLE<uint16_t>();
2432188SN/A        break;
2441858SN/A      case 4:
2452SN/A        data = pkt->getLE<uint32_t>();
2465704Snate@binkert.org        break;
2472680SN/A      default:
2482SN/A        panic("PL111 CLCD controller write size too big?\n");
2492SN/A        break;
2502SN/A    }
2512188SN/A
2522680SN/A    assert(pkt->getAddr() >= pioAddr &&
2535715Shsul@eecs.umich.edu           pkt->getAddr() < pioAddr + pioSize);
2542SN/A
2552SN/A    Addr daddr = pkt->getAddr() - pioAddr;
2562SN/A
2572683Sktlim@umich.edu    DPRINTF(PL111, " write register %#x value %#x size=%d\n", daddr,
258393SN/A            pkt->getLE<uint8_t>(), pkt->getSize());
2592680SN/A
260393SN/A    switch (daddr) {
261393SN/A      case LcdTiming0:
2622680SN/A        lcdTiming0 = data;
2635715Shsul@eecs.umich.edu        // width = 16 * (PPL+1)
264393SN/A        width = (lcdTiming0.ppl + 1) << 4;
265393SN/A        break;
266393SN/A      case LcdTiming1:
2672683Sktlim@umich.edu        lcdTiming1 = data;
268393SN/A        // height = LPP + 1
2692680SN/A        height = (lcdTiming1.lpp) + 1;
270393SN/A        break;
271393SN/A      case LcdTiming2:
2722680SN/A        lcdTiming2 = data;
2735715Shsul@eecs.umich.edu        break;
274393SN/A      case LcdTiming3:
275393SN/A        lcdTiming3 = data;
276393SN/A        break;
277393SN/A      case LcdUpBase:
2782683Sktlim@umich.edu        lcdUpbase = data;
2792SN/A        DPRINTF(PL111, "####### Upper panel base set to: %#x #######\n", lcdUpbase);
2802330SN/A        break;
2812341SN/A      case LcdLpBase:
2822341SN/A        warn_once("LCD dual screen mode not supported\n");
2832330SN/A        lcdLpbase = data;
2842SN/A        DPRINTF(PL111, "###### Lower panel base set to: %#x #######\n", lcdLpbase);
285716SN/A        break;
286716SN/A      case LcdControl:
2872683Sktlim@umich.edu        int old_lcdpwr;
2882190SN/A        old_lcdpwr = lcdControl.lcdpwr;
2892680SN/A        lcdControl = data;
2902190SN/A
2912190SN/A        DPRINTF(PL111, "LCD power is:%d\n", lcdControl.lcdpwr);
292
293        // LCD power enable
294        if (lcdControl.lcdpwr && !old_lcdpwr) {
295            updateVideoParams();
296            DPRINTF(PL111, " lcd size: height %d width %d\n", height, width);
297            waterMark = lcdControl.watermark ? 8 : 4;
298            startDma();
299        }
300        break;
301      case LcdImsc:
302        lcdImsc = data;
303        if (lcdImsc.vcomp)
304            panic("Interrupting on vcomp not supported\n");
305
306        lcdMis = lcdImsc & lcdRis;
307
308        if (!lcdMis)
309            gic->clearInt(intNum);
310
311         break;
312      case LcdRis:
313        panic("LCD register at offset %#x is Read-Only\n", daddr);
314        break;
315      case LcdMis:
316        panic("LCD register at offset %#x is Read-Only\n", daddr);
317        break;
318      case LcdIcr:
319        lcdRis = lcdRis & ~data;
320        lcdMis = lcdImsc & lcdRis;
321
322        if (!lcdMis)
323            gic->clearInt(intNum);
324
325        break;
326      case LcdUpCurr:
327        panic("LCD register at offset %#x is Read-Only\n", daddr);
328        break;
329      case LcdLpCurr:
330        panic("LCD register at offset %#x is Read-Only\n", daddr);
331        break;
332      case ClcdCrsrCtrl:
333        clcdCrsrCtrl = data;
334        break;
335      case ClcdCrsrConfig:
336        clcdCrsrConfig = data;
337        break;
338      case ClcdCrsrPalette0:
339        clcdCrsrPalette0 = data;
340        break;
341      case ClcdCrsrPalette1:
342        clcdCrsrPalette1 = data;
343        break;
344      case ClcdCrsrXY:
345        clcdCrsrXY = data;
346        break;
347      case ClcdCrsrClip:
348        clcdCrsrClip = data;
349        break;
350      case ClcdCrsrImsc:
351        clcdCrsrImsc = data;
352        break;
353      case ClcdCrsrIcr:
354        clcdCrsrIcr = data;
355        break;
356      case ClcdCrsrRis:
357        panic("CLCD register at offset %#x is Read-Only\n", daddr);
358        break;
359      case ClcdCrsrMis:
360        panic("CLCD register at offset %#x is Read-Only\n", daddr);
361        break;
362      default:
363        if (daddr >= CrsrImage && daddr <= 0xBFC) {
364            // CURSOR IMAGE
365            int index;
366            index = (daddr - CrsrImage) >> 2;
367            cursorImage[index] = data;
368            break;
369        } else if (daddr >= LcdPalette && daddr <= 0x3FC) {
370            // LCD Palette
371            int index;
372            index = (daddr - LcdPalette) >> 2;
373            lcdPalette[index] = data;
374            break;
375        } else {
376            panic("Tried to write PL111 register at offset %#x that "
377                       "doesn't exist\n", daddr);
378            break;
379        }
380    }
381
382    pkt->makeAtomicResponse();
383    return pioDelay;
384}
385
386PixelConverter
387Pl111::pixelConverter() const
388{
389    unsigned rw, gw, bw;
390    unsigned offsets[3];
391
392    switch (lcdControl.lcdbpp) {
393      case bpp24:
394        rw = gw = bw = 8;
395        offsets[0] = 0;
396        offsets[1] = 8;
397        offsets[2] = 16;
398        break;
399
400      case bpp16m565:
401        rw = 5;
402        gw = 6;
403        bw = 5;
404        offsets[0] = 0;
405        offsets[1] = 5;
406        offsets[2] = 11;
407        break;
408
409      default:
410        panic("Unimplemented video mode\n");
411    }
412
413    if (lcdControl.bgr) {
414        return PixelConverter(
415            bytesPerPixel,
416            offsets[2], offsets[1], offsets[0],
417            rw, gw, bw,
418            LittleEndianByteOrder);
419    } else {
420        return PixelConverter(
421            bytesPerPixel,
422            offsets[0], offsets[1], offsets[2],
423            rw, gw, bw,
424            LittleEndianByteOrder);
425    }
426}
427
428void
429Pl111::updateVideoParams()
430{
431    if (lcdControl.lcdbpp == bpp24) {
432        bytesPerPixel = 4;
433    } else if (lcdControl.lcdbpp == bpp16m565) {
434        bytesPerPixel = 2;
435    }
436
437    fb.resize(width, height);
438    converter = pixelConverter();
439
440    // Workaround configuration bugs where multiple display
441    // controllers are attached to the same VNC server by reattaching
442    // enabled devices. This isn't ideal, but works as long as only
443    // one display controller is active at a time.
444    if (lcdControl.lcdpwr && vnc)
445        vnc->setFrameBuffer(&fb);
446}
447
448void
449Pl111::startDma()
450{
451    if (dmaPendingNum != 0 || readEvent.scheduled())
452        return;
453    readFramebuffer();
454}
455
456void
457Pl111::readFramebuffer()
458{
459    // initialization for dma read from frame buffer to dma buffer
460    uint32_t length = height * width;
461    if (startAddr != lcdUpbase)
462        startAddr = lcdUpbase;
463
464    // Updating base address, interrupt if we're supposed to
465    lcdRis.baseaddr = 1;
466    if (!intEvent.scheduled())
467        schedule(intEvent, clockEdge());
468
469    curAddr = 0;
470    startTime = curTick();
471
472    maxAddr = static_cast<Addr>(length * bytesPerPixel);
473
474    DPRINTF(PL111, " lcd frame buffer size of %d bytes \n", maxAddr);
475
476    fillFifo();
477}
478
479void
480Pl111::fillFifo()
481{
482    while ((dmaPendingNum < maxOutstandingDma) && (maxAddr >= curAddr + dmaSize )) {
483        // concurrent dma reads need different dma done events
484        // due to assertion in scheduling state
485        ++dmaPendingNum;
486
487        assert(!dmaDoneEventFree.empty());
488        DmaDoneEvent *event(dmaDoneEventFree.back());
489        dmaDoneEventFree.pop_back();
490        assert(!event->scheduled());
491
492        // We use a uncachable request here because the requests from the CPU
493        // will be uncacheable as well. If we have uncacheable and cacheable
494        // requests in the memory system for the same address it won't be
495        // pleased
496        dmaPort.dmaAction(MemCmd::ReadReq, curAddr + startAddr, dmaSize,
497                          event, curAddr + dmaBuffer,
498                          0, Request::UNCACHEABLE);
499        curAddr += dmaSize;
500    }
501}
502
503void
504Pl111::dmaDone()
505{
506    DPRINTF(PL111, "DMA Done\n");
507
508    Tick maxFrameTime = lcdTiming2.cpl * height * pixelClock;
509
510    --dmaPendingNum;
511
512    if (maxAddr == curAddr && !dmaPendingNum) {
513        if ((curTick() - startTime) > maxFrameTime) {
514            warn("CLCD controller buffer underrun, took %d ticks when should"
515                 " have taken %d\n", curTick() - startTime, maxFrameTime);
516            lcdRis.underflow = 1;
517            if (!intEvent.scheduled())
518                schedule(intEvent, clockEdge());
519        }
520
521        assert(!readEvent.scheduled());
522        fb.copyIn(dmaBuffer, converter);
523        if (vnc)
524            vnc->setDirty();
525
526        if (enableCapture) {
527            DPRINTF(PL111, "-- write out frame buffer into bmp\n");
528
529            if (!pic)
530                pic = simout.create(csprintf("%s.framebuffer.bmp", sys->name()),
531                                    true);
532
533            assert(pic);
534            pic->stream()->seekp(0);
535            bmp.write(*pic->stream());
536        }
537
538        // schedule the next read based on when the last frame started
539        // and the desired fps (i.e. maxFrameTime), we turn the
540        // argument into a relative number of cycles in the future
541        if (lcdControl.lcden)
542            schedule(readEvent, clockEdge(ticksToCycles(startTime -
543                                                        curTick() +
544                                                        maxFrameTime)));
545    }
546
547    if (dmaPendingNum > (maxOutstandingDma - waterMark))
548        return;
549
550    if (!fillFifoEvent.scheduled())
551        schedule(fillFifoEvent, clockEdge());
552}
553
554void
555Pl111::serialize(CheckpointOut &cp) const
556{
557    DPRINTF(PL111, "Serializing ARM PL111\n");
558
559    uint32_t lcdTiming0_serial = lcdTiming0;
560    SERIALIZE_SCALAR(lcdTiming0_serial);
561
562    uint32_t lcdTiming1_serial = lcdTiming1;
563    SERIALIZE_SCALAR(lcdTiming1_serial);
564
565    uint32_t lcdTiming2_serial = lcdTiming2;
566    SERIALIZE_SCALAR(lcdTiming2_serial);
567
568    uint32_t lcdTiming3_serial = lcdTiming3;
569    SERIALIZE_SCALAR(lcdTiming3_serial);
570
571    SERIALIZE_SCALAR(lcdUpbase);
572    SERIALIZE_SCALAR(lcdLpbase);
573
574    uint32_t lcdControl_serial = lcdControl;
575    SERIALIZE_SCALAR(lcdControl_serial);
576
577    uint8_t lcdImsc_serial = lcdImsc;
578    SERIALIZE_SCALAR(lcdImsc_serial);
579
580    uint8_t lcdRis_serial = lcdRis;
581    SERIALIZE_SCALAR(lcdRis_serial);
582
583    uint8_t lcdMis_serial = lcdMis;
584    SERIALIZE_SCALAR(lcdMis_serial);
585
586    SERIALIZE_ARRAY(lcdPalette, LcdPaletteSize);
587    SERIALIZE_ARRAY(cursorImage, CrsrImageSize);
588
589    SERIALIZE_SCALAR(clcdCrsrCtrl);
590    SERIALIZE_SCALAR(clcdCrsrConfig);
591    SERIALIZE_SCALAR(clcdCrsrPalette0);
592    SERIALIZE_SCALAR(clcdCrsrPalette1);
593    SERIALIZE_SCALAR(clcdCrsrXY);
594    SERIALIZE_SCALAR(clcdCrsrClip);
595
596    uint8_t clcdCrsrImsc_serial = clcdCrsrImsc;
597    SERIALIZE_SCALAR(clcdCrsrImsc_serial);
598
599    uint8_t clcdCrsrIcr_serial = clcdCrsrIcr;
600    SERIALIZE_SCALAR(clcdCrsrIcr_serial);
601
602    uint8_t clcdCrsrRis_serial = clcdCrsrRis;
603    SERIALIZE_SCALAR(clcdCrsrRis_serial);
604
605    uint8_t clcdCrsrMis_serial = clcdCrsrMis;
606    SERIALIZE_SCALAR(clcdCrsrMis_serial);
607
608    SERIALIZE_SCALAR(height);
609    SERIALIZE_SCALAR(width);
610    SERIALIZE_SCALAR(bytesPerPixel);
611
612    SERIALIZE_ARRAY(dmaBuffer, buffer_size);
613    SERIALIZE_SCALAR(startTime);
614    SERIALIZE_SCALAR(startAddr);
615    SERIALIZE_SCALAR(maxAddr);
616    SERIALIZE_SCALAR(curAddr);
617    SERIALIZE_SCALAR(waterMark);
618    SERIALIZE_SCALAR(dmaPendingNum);
619
620    Tick int_event_time = 0;
621    Tick read_event_time = 0;
622    Tick fill_fifo_event_time = 0;
623
624    if (readEvent.scheduled())
625        read_event_time = readEvent.when();
626    if (fillFifoEvent.scheduled())
627        fill_fifo_event_time = fillFifoEvent.when();
628    if (intEvent.scheduled())
629        int_event_time = intEvent.when();
630
631    SERIALIZE_SCALAR(read_event_time);
632    SERIALIZE_SCALAR(fill_fifo_event_time);
633    SERIALIZE_SCALAR(int_event_time);
634
635    vector<Tick> dma_done_event_tick;
636    dma_done_event_tick.resize(maxOutstandingDma);
637    for (int x = 0; x < maxOutstandingDma; x++) {
638        dma_done_event_tick[x] = dmaDoneEventAll[x].scheduled() ?
639            dmaDoneEventAll[x].when() : 0;
640    }
641    SERIALIZE_CONTAINER(dma_done_event_tick);
642}
643
644void
645Pl111::unserialize(CheckpointIn &cp)
646{
647    DPRINTF(PL111, "Unserializing ARM PL111\n");
648
649    uint32_t lcdTiming0_serial;
650    UNSERIALIZE_SCALAR(lcdTiming0_serial);
651    lcdTiming0 = lcdTiming0_serial;
652
653    uint32_t lcdTiming1_serial;
654    UNSERIALIZE_SCALAR(lcdTiming1_serial);
655    lcdTiming1 = lcdTiming1_serial;
656
657    uint32_t lcdTiming2_serial;
658    UNSERIALIZE_SCALAR(lcdTiming2_serial);
659    lcdTiming2 = lcdTiming2_serial;
660
661    uint32_t lcdTiming3_serial;
662    UNSERIALIZE_SCALAR(lcdTiming3_serial);
663    lcdTiming3 = lcdTiming3_serial;
664
665    UNSERIALIZE_SCALAR(lcdUpbase);
666    UNSERIALIZE_SCALAR(lcdLpbase);
667
668    uint32_t lcdControl_serial;
669    UNSERIALIZE_SCALAR(lcdControl_serial);
670    lcdControl = lcdControl_serial;
671
672    uint8_t lcdImsc_serial;
673    UNSERIALIZE_SCALAR(lcdImsc_serial);
674    lcdImsc = lcdImsc_serial;
675
676    uint8_t lcdRis_serial;
677    UNSERIALIZE_SCALAR(lcdRis_serial);
678    lcdRis = lcdRis_serial;
679
680    uint8_t lcdMis_serial;
681    UNSERIALIZE_SCALAR(lcdMis_serial);
682    lcdMis = lcdMis_serial;
683
684    UNSERIALIZE_ARRAY(lcdPalette, LcdPaletteSize);
685    UNSERIALIZE_ARRAY(cursorImage, CrsrImageSize);
686
687    UNSERIALIZE_SCALAR(clcdCrsrCtrl);
688    UNSERIALIZE_SCALAR(clcdCrsrConfig);
689    UNSERIALIZE_SCALAR(clcdCrsrPalette0);
690    UNSERIALIZE_SCALAR(clcdCrsrPalette1);
691    UNSERIALIZE_SCALAR(clcdCrsrXY);
692    UNSERIALIZE_SCALAR(clcdCrsrClip);
693
694    uint8_t clcdCrsrImsc_serial;
695    UNSERIALIZE_SCALAR(clcdCrsrImsc_serial);
696    clcdCrsrImsc = clcdCrsrImsc_serial;
697
698    uint8_t clcdCrsrIcr_serial;
699    UNSERIALIZE_SCALAR(clcdCrsrIcr_serial);
700    clcdCrsrIcr = clcdCrsrIcr_serial;
701
702    uint8_t clcdCrsrRis_serial;
703    UNSERIALIZE_SCALAR(clcdCrsrRis_serial);
704    clcdCrsrRis = clcdCrsrRis_serial;
705
706    uint8_t clcdCrsrMis_serial;
707    UNSERIALIZE_SCALAR(clcdCrsrMis_serial);
708    clcdCrsrMis = clcdCrsrMis_serial;
709
710    UNSERIALIZE_SCALAR(height);
711    UNSERIALIZE_SCALAR(width);
712    UNSERIALIZE_SCALAR(bytesPerPixel);
713
714    UNSERIALIZE_ARRAY(dmaBuffer, buffer_size);
715    UNSERIALIZE_SCALAR(startTime);
716    UNSERIALIZE_SCALAR(startAddr);
717    UNSERIALIZE_SCALAR(maxAddr);
718    UNSERIALIZE_SCALAR(curAddr);
719    UNSERIALIZE_SCALAR(waterMark);
720    UNSERIALIZE_SCALAR(dmaPendingNum);
721
722    Tick int_event_time = 0;
723    Tick read_event_time = 0;
724    Tick fill_fifo_event_time = 0;
725
726    UNSERIALIZE_SCALAR(read_event_time);
727    UNSERIALIZE_SCALAR(fill_fifo_event_time);
728    UNSERIALIZE_SCALAR(int_event_time);
729
730    if (int_event_time)
731        schedule(intEvent, int_event_time);
732    if (read_event_time)
733        schedule(readEvent, read_event_time);
734    if (fill_fifo_event_time)
735        schedule(fillFifoEvent, fill_fifo_event_time);
736
737    vector<Tick> dma_done_event_tick;
738    dma_done_event_tick.resize(maxOutstandingDma);
739    UNSERIALIZE_CONTAINER(dma_done_event_tick);
740    dmaDoneEventFree.clear();
741    for (int x = 0; x < maxOutstandingDma; x++) {
742        if (dma_done_event_tick[x])
743            schedule(dmaDoneEventAll[x], dma_done_event_tick[x]);
744        else
745            dmaDoneEventFree.push_back(&dmaDoneEventAll[x]);
746    }
747    assert(maxOutstandingDma - dmaDoneEventFree.size() == dmaPendingNum);
748
749    if (lcdControl.lcdpwr) {
750        updateVideoParams();
751        fb.copyIn(dmaBuffer, converter);
752        if (vnc)
753            vnc->setDirty();
754    }
755}
756
757void
758Pl111::generateInterrupt()
759{
760    DPRINTF(PL111, "Generate Interrupt: lcdImsc=0x%x lcdRis=0x%x lcdMis=0x%x\n",
761            (uint32_t)lcdImsc, (uint32_t)lcdRis, (uint32_t)lcdMis);
762    lcdMis = lcdImsc & lcdRis;
763
764    if (lcdMis.underflow || lcdMis.baseaddr || lcdMis.vcomp || lcdMis.ahbmaster) {
765        gic->sendInt(intNum);
766        DPRINTF(PL111, " -- Generated\n");
767    }
768}
769
770AddrRangeList
771Pl111::getAddrRanges() const
772{
773    AddrRangeList ranges;
774    ranges.push_back(RangeSize(pioAddr, pioSize));
775    return ranges;
776}
777
778Pl111 *
779Pl111Params::create()
780{
781    return new Pl111(this);
782}
783
784
785