gic_v2m.hh revision 10749:ac3611ba911c 
1/*
2 * Copyright (c) 2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Matt Evans
38 */
39
40/** @file
41 * Implementiation of a GICv2m MSI shim.
42 *
43 * See gic_v2m.cc for an instantiation example.
44 */
45
46#ifndef __DEV_ARM_GIC_V2M_H__
47#define __DEV_ARM_GIC_V2M_H__
48
49#include "base/bitunion.hh"
50#include "cpu/intr_control.hh"
51#include "dev/arm/base_gic.hh"
52#include "dev/io_device.hh"
53#include "dev/platform.hh"
54#include "params/Gicv2m.hh"
55#include "params/Gicv2mFrame.hh"
56
57/**
58 * Ultimately this class should be embedded in the Gicv2m class, but
59 * this confuses Python as 'Gicv2m::Frame' gets interpreted as 'Frame'
60 * in namespace Gicv2m.
61 */
62class Gicv2mFrame : public SimObject
63{
64  public:
65    const Addr          addr;
66    const unsigned int  spi_base;
67    const unsigned int  spi_len;
68
69    typedef Gicv2mFrameParams Params;
70    Gicv2mFrame(const Params *p) :
71        SimObject(p), addr(p->addr), spi_base(p->spi_base), spi_len(p->spi_len)
72    {}
73};
74
75class Gicv2m : public PioDevice
76{
77  private:
78    static const int FRAME_SIZE         = 0x10000;
79
80    static const int MSI_TYPER          = 0x0008;
81    static const int MSI_SETSPI_NSR     = 0x0040;
82    static const int PER_ID4            = 0x0fd0;
83
84    /** Latency for an MMIO operation */
85    const Tick pioDelay;
86
87    /** A set of configured hardware frames */
88    std::vector<Gicv2mFrame *> frames;
89
90    /** Gic to which we fire interrupts */
91    BaseGic *gic;
92
93    /** Count of number of configured frames, as log2(frames) */
94    unsigned int log2framenum;
95
96  public:
97    typedef Gicv2mParams Params;
98    Gicv2m(const Params *p);
99
100    /** @{ */
101    /** Return the address ranges used by the Gicv2m
102     * This is the set of frame addresses
103     */
104    virtual AddrRangeList getAddrRanges() const;
105
106    /** A PIO read to the device
107     */
108    virtual Tick read(PacketPtr pkt);
109
110    /** A PIO read to the device
111     */
112    virtual Tick write(PacketPtr pkt);
113    /** @} */
114
115  private:
116    /** Determine which frame a PIO access lands in
117     */
118    int frameFromAddr(Addr a) const;
119};
120
121#endif //__DEV_ARM_GIC_V2M_H__
122