base_gic.cc revision 12974:b840a646cfbd 
1/*
2 * Copyright (c) 2012, 2017-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Andreas Sandberg
38 */
39
40#include "dev/arm/base_gic.hh"
41
42#include "cpu/thread_context.hh"
43#include "dev/arm/realview.hh"
44#include "params/ArmInterruptPin.hh"
45#include "params/ArmPPI.hh"
46#include "params/ArmSPI.hh"
47#include "params/BaseGic.hh"
48
49BaseGic::BaseGic(const Params *p)
50        : PioDevice(p),
51          platform(p->platform)
52{
53    RealView *const rv(dynamic_cast<RealView*>(p->platform));
54    // The platform keeps track of the GIC that is hooked up to the
55    // system. Due to quirks in gem5's configuration system, the
56    // platform can't take a GIC as parameter. Instead, we need to
57    // register with the platform when a new GIC is created. If we
58    // can't find a platform, something is seriously wrong.
59    fatal_if(!rv, "GIC model can't register with platform code");
60    rv->setGic(this);
61}
62
63BaseGic::~BaseGic()
64{
65}
66
67const BaseGic::Params *
68BaseGic::params() const
69{
70    return dynamic_cast<const Params *>(_params);
71}
72
73ArmInterruptPinGen::ArmInterruptPinGen(const ArmInterruptPinParams *p)
74  : SimObject(p)
75{
76}
77
78ArmSPIGen::ArmSPIGen(const ArmSPIParams *p)
79    : ArmInterruptPinGen(p), pin(new ArmSPI(p->platform, p->num))
80{
81}
82
83ArmInterruptPin*
84ArmSPIGen::get(ThreadContext* tc)
85{
86    return pin;
87}
88
89ArmPPIGen::ArmPPIGen(const ArmPPIParams *p)
90    : ArmInterruptPinGen(p)
91{
92}
93
94ArmInterruptPin*
95ArmPPIGen::get(ThreadContext* tc)
96{
97    panic_if(!tc, "Invalid Thread Context\n");
98    ContextID cid = tc->contextId();
99
100    auto pin_it = pins.find(cid);
101
102    if (pin_it != pins.end()) {
103        // PPI Pin Already generated
104        return pin_it->second;
105    } else {
106        // Generate PPI Pin
107        auto p = static_cast<const ArmPPIParams *>(_params);
108        ArmPPI *pin = new ArmPPI(p->platform, tc, p->num);
109
110        pins.insert({cid, pin});
111
112        return pin;
113    }
114}
115
116ArmInterruptPin::ArmInterruptPin(
117    Platform  *_platform, ThreadContext *tc, uint32_t int_num)
118      : threadContext(tc), platform(dynamic_cast<RealView*>(_platform)),
119        intNum(int_num)
120{
121    fatal_if(!platform, "Interrupt not connected to a RealView platform");
122}
123
124void
125ArmInterruptPin::setThreadContext(ThreadContext *tc)
126{
127    panic_if(threadContext,
128             "InterruptLine::setThreadContext called twice\n");
129
130    threadContext = tc;
131}
132
133ContextID
134ArmInterruptPin::targetContext() const
135{
136    panic_if(!threadContext, "Per-context interrupt triggered without a " \
137             "call to InterruptLine::setThreadContext.\n");
138    return threadContext->contextId();
139}
140
141ArmSPI::ArmSPI(
142    Platform  *_platform, uint32_t int_num)
143      : ArmInterruptPin(_platform, nullptr, int_num)
144{
145}
146
147void
148ArmSPI::raise()
149{
150    platform->gic->sendInt(intNum);
151}
152
153void
154ArmSPI::clear()
155{
156    platform->gic->clearInt(intNum);
157}
158
159ArmPPI::ArmPPI(
160    Platform  *_platform, ThreadContext *tc, uint32_t int_num)
161      : ArmInterruptPin(_platform, tc, int_num)
162{
163}
164
165void
166ArmPPI::raise()
167{
168    platform->gic->sendPPInt(intNum, targetContext());
169}
170
171void
172ArmPPI::clear()
173{
174    platform->gic->clearPPInt(intNum, targetContext());
175}
176
177ArmSPIGen *
178ArmSPIParams::create()
179{
180    return new ArmSPIGen(this);
181}
182
183ArmPPIGen *
184ArmPPIParams::create()
185{
186    return new ArmPPIGen(this);
187}
188