110801Srene.dejong@arm.com/* 210801Srene.dejong@arm.com * Copyright (c) 2013-2015 ARM Limited 310801Srene.dejong@arm.com * All rights reserved 410801Srene.dejong@arm.com * 510801Srene.dejong@arm.com * The license below extends only to copyright in the software and shall 610801Srene.dejong@arm.com * not be construed as granting a license to any other intellectual 710801Srene.dejong@arm.com * property including but not limited to intellectual property relating 810801Srene.dejong@arm.com * to a hardware implementation of the functionality of the software 910801Srene.dejong@arm.com * licensed hereunder. You may use the software subject to the license 1010801Srene.dejong@arm.com * terms below provided that you ensure that this notice is replicated 1110801Srene.dejong@arm.com * unmodified and in its entirety in all distributions of the software, 1210801Srene.dejong@arm.com * modified or unmodified, in source code or in binary form. 1310801Srene.dejong@arm.com * 1410801Srene.dejong@arm.com * Redistribution and use in source and binary forms, with or without 1510801Srene.dejong@arm.com * modification, are permitted provided that the following conditions are 1610801Srene.dejong@arm.com * met: redistributions of source code must retain the above copyright 1710801Srene.dejong@arm.com * notice, this list of conditions and the following disclaimer; 1810801Srene.dejong@arm.com * redistributions in binary form must reproduce the above copyright 1910801Srene.dejong@arm.com * notice, this list of conditions and the following disclaimer in the 2010801Srene.dejong@arm.com * documentation and/or other materials provided with the distribution; 2110801Srene.dejong@arm.com * neither the name of the copyright holders nor the names of its 2210801Srene.dejong@arm.com * contributors may be used to endorse or promote products derived from 2310801Srene.dejong@arm.com * this software without specific prior written permission. 2410801Srene.dejong@arm.com * 2510801Srene.dejong@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2610801Srene.dejong@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2710801Srene.dejong@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2810801Srene.dejong@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2910801Srene.dejong@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3010801Srene.dejong@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3110801Srene.dejong@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3210801Srene.dejong@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3310801Srene.dejong@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3410801Srene.dejong@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3510801Srene.dejong@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3610801Srene.dejong@arm.com * 3710801Srene.dejong@arm.com * Authors: Rene de Jong 3810801Srene.dejong@arm.com */ 3910801Srene.dejong@arm.com 4010801Srene.dejong@arm.com#ifndef __DEV_ARM_ABSTRACT_NVM_HH__ 4110801Srene.dejong@arm.com#define __DEV_ARM_ABSTRACT_NVM_HH__ 4210801Srene.dejong@arm.com 4310801Srene.dejong@arm.com#include "base/callback.hh" 4410801Srene.dejong@arm.com#include "params/AbstractNVM.hh" 4510801Srene.dejong@arm.com#include "sim/sim_object.hh" 4610801Srene.dejong@arm.com 4710801Srene.dejong@arm.com/** 4810801Srene.dejong@arm.com * This is an interface between the disk interface (which will handle the disk 4910801Srene.dejong@arm.com * data transactions) and the timing model. The timing model only takes care 5010801Srene.dejong@arm.com * of calculating the appropriate delay to the disk, and calling back a 5110801Srene.dejong@arm.com * function when the action has completed. All the other associated actions 5210801Srene.dejong@arm.com * (such as getting data from A to B) should be taken care of by the disk 5310801Srene.dejong@arm.com * interface. 5410801Srene.dejong@arm.com */ 5510801Srene.dejong@arm.comclass AbstractNVM : public SimObject 5610801Srene.dejong@arm.com{ 5710801Srene.dejong@arm.com 5810801Srene.dejong@arm.com public: 5910801Srene.dejong@arm.com AbstractNVM(const AbstractNVMParams* p): SimObject(p) {}; 6010801Srene.dejong@arm.com virtual ~AbstractNVM() {}; 6110801Srene.dejong@arm.com 6210801Srene.dejong@arm.com /** 6310801Srene.dejong@arm.com * Initialize Memory. 6410801Srene.dejong@arm.com * This function is used to set the memory device dimensions to the 6510801Srene.dejong@arm.com * dimensions that it controls. For instance, One can imagine that the 6610801Srene.dejong@arm.com * memory is one disk, e.g. the /data partition of Android, which means 6710801Srene.dejong@arm.com * that the data handling part will have an image of /data. On the other 6810801Srene.dejong@arm.com * hand one might want to set up a Raid like configuration, without 6910801Srene.dejong@arm.com * wanting to create multiple disk images. In that case one can choose to 7010801Srene.dejong@arm.com * devide the image over multiple memory devices in any way he wants 7110801Srene.dejong@arm.com * (i.e. higher layers can implement some division based on logical 7210801Srene.dejong@arm.com * addresses, or intelligent file system interpretation analysis; to 7310801Srene.dejong@arm.com * effectively devide the disk over the devices; enabling object oriented 7410801Srene.dejong@arm.com * storage devices). 7510801Srene.dejong@arm.com * Moving this function outside of the constructor allows you the 7610801Srene.dejong@arm.com * flexibility to make this decision once the image is loaded. 7710801Srene.dejong@arm.com * 7810801Srene.dejong@arm.com * @param disk_size disksize in sectors; value can be obtained from the 7910801Srene.dejong@arm.com * disk image 8010801Srene.dejong@arm.com * @param sector_size size of one sector in bytes; value is defined in 8110801Srene.dejong@arm.com * disk_image.hh 8210801Srene.dejong@arm.com */ 8310801Srene.dejong@arm.com virtual void initializeMemory(uint64_t disk_size, uint32_t sector_size) = 8410801Srene.dejong@arm.com 0; 8510801Srene.dejong@arm.com 8610801Srene.dejong@arm.com /** 8710801Srene.dejong@arm.com * Access functions 8810801Srene.dejong@arm.com * Access function to simulate a read/write access to the memory. Once 8910801Srene.dejong@arm.com * the action has completed, the Callback event should be called. Putting 9010801Srene.dejong@arm.com * a NULL pointer as callback is valid syntax, and should result in the 9110801Srene.dejong@arm.com * simulation of the access, but with no callback to the higher layer. 9210801Srene.dejong@arm.com * This may be used to occupy the device, such that next actions will be 9310801Srene.dejong@arm.com * delayed. The read/write function will schedule the incoming requests 9410801Srene.dejong@arm.com * on a first come first serve basis. 9510801Srene.dejong@arm.com * 9610801Srene.dejong@arm.com * @param address The logical address to a location in the Non-volatile 9710801Srene.dejong@arm.com * memory. 9810801Srene.dejong@arm.com * @param amount The amount of data transfered from the NVM in bytes 9910801Srene.dejong@arm.com * @param event A pointer to a callback function that will perform the 10010801Srene.dejong@arm.com * actions taken by the disk controller on successfull completion of the 10110801Srene.dejong@arm.com * data transfer between the disk and the disk controller. 10210801Srene.dejong@arm.com */ 10310801Srene.dejong@arm.com virtual void readMemory(uint64_t address, uint32_t amount, 10410801Srene.dejong@arm.com Callback *event) = 0; 10510801Srene.dejong@arm.com virtual void writeMemory(uint64_t address, uint32_t amount, 10610801Srene.dejong@arm.com Callback *event) = 0; 10710801Srene.dejong@arm.com}; 10810801Srene.dejong@arm.com 10910801Srene.dejong@arm.com#endif //__DEV_ARM_ABSTRACT_NVM_HH__ 110