RealView.py revision 8461
1# Copyright (c) 2009 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Copyright (c) 2006-2007 The Regents of The University of Michigan 14# All rights reserved. 15# 16# Redistribution and use in source and binary forms, with or without 17# modification, are permitted provided that the following conditions are 18# met: redistributions of source code must retain the above copyright 19# notice, this list of conditions and the following disclaimer; 20# redistributions in binary form must reproduce the above copyright 21# notice, this list of conditions and the following disclaimer in the 22# documentation and/or other materials provided with the distribution; 23# neither the name of the copyright holders nor the names of its 24# contributors may be used to endorse or promote products derived from 25# this software without specific prior written permission. 26# 27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 30# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 32# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38# 39# Authors: Ali Saidi 40# Gabe Black 41# William Wang 42 43from m5.params import * 44from m5.proxy import * 45from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr, DmaDevice 46from Ide import * 47from Platform import Platform 48from Terminal import Terminal 49from Uart import Uart 50 51class AmbaDevice(BasicPioDevice): 52 type = 'AmbaDevice' 53 abstract = True 54 amba_id = Param.UInt32("ID of AMBA device for kernel detection") 55 56class AmbaIntDevice(AmbaDevice): 57 type = 'AmbaIntDevice' 58 abstract = True 59 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 60 int_num = Param.UInt32("Interrupt number that connects to GIC") 61 int_delay = Param.Latency("100ns", 62 "Time between action and interrupt generation by device") 63 64class AmbaDmaDevice(DmaDevice): 65 type = 'AmbaDmaDevice' 66 abstract = True 67 pio_addr = Param.Addr("Address for AMBA slave interface") 68 pio_latency = Param.Latency("10ns", "Time between action and write/read result by AMBA DMA Device") 69 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 70 int_num = Param.UInt32("Interrupt number that connects to GIC") 71 amba_id = Param.UInt32("ID of AMBA device for kernel detection") 72 73class A9SCU(BasicPioDevice): 74 type = 'A9SCU' 75 76class RealViewCtrl(BasicPioDevice): 77 type = 'RealViewCtrl' 78 proc_id = Param.UInt32(0x0C000000, "Processor ID, SYS_PROCID") 79 idreg = Param.UInt32(0x00000000, "ID Register, SYS_ID") 80 81class Gic(PioDevice): 82 type = 'Gic' 83 dist_addr = Param.Addr(0x1f001000, "Address for distributor") 84 cpu_addr = Param.Addr(0x1f000100, "Address for cpu") 85 dist_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to distributor") 86 cpu_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to cpu interface") 87 int_latency = Param.Latency('10ns', "Delay for interrupt to get to CPU") 88 it_lines = Param.UInt32(128, "Number of interrupt lines supported (max = 1020)") 89 90class AmbaFake(AmbaDevice): 91 type = 'AmbaFake' 92 ignore_access = Param.Bool(False, "Ignore reads/writes to this device, (e.g. IsaFake + AMBA)") 93 amba_id = 0; 94 95class Pl011(Uart): 96 type = 'Pl011' 97 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 98 int_num = Param.UInt32("Interrupt number that connects to GIC") 99 end_on_eot = Param.Bool(False, "End the simulation when a EOT is received on the UART") 100 int_delay = Param.Latency("100ns", "Time between action and interrupt generation by UART") 101 102class Sp804(AmbaDevice): 103 type = 'Sp804' 104 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 105 int_num0 = Param.UInt32("Interrupt number that connects to GIC") 106 clock0 = Param.Clock('1MHz', "Clock speed of the input") 107 int_num1 = Param.UInt32("Interrupt number that connects to GIC") 108 clock1 = Param.Clock('1MHz', "Clock speed of the input") 109 amba_id = 0x00141804 110 111class Pl050(AmbaIntDevice): 112 type = 'Pl050' 113 vnc = Param.VncServer(Parent.any, "Vnc server for remote frame buffer display") 114 is_mouse = Param.Bool(False, "Is this interface a mouse, if not a keyboard") 115 int_delay = '1us' 116 amba_id = 0x00141050 117 118class Pl111(AmbaDmaDevice): 119 type = 'Pl111' 120 clock = Param.Clock('24MHz', "Clock speed of the input") 121 vnc = Param.VncServer(Parent.any, "Vnc server for remote frame buffer display") 122 amba_id = 0x00141111 123 124class RealView(Platform): 125 type = 'RealView' 126 system = Param.System(Parent.any, "system") 127 128# Reference for memory map and interrupt number 129# RealView Platform Baseboard Explore for Cortex-A9 User Guide(ARM DUI 0440A) 130# Chapter 4: Programmer's Reference 131class RealViewPBX(RealView): 132 uart = Pl011(pio_addr=0x10009000, int_num=44) 133 realview_io = RealViewCtrl(pio_addr=0x10000000) 134 gic = Gic() 135 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000) 136 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000) 137 clcd = Pl111(pio_addr=0x10020000, int_num=55) 138 kmi0 = Pl050(pio_addr=0x10006000, int_num=52) 139 kmi1 = Pl050(pio_addr=0x10007000, int_num=53, is_mouse=True) 140 a9scu = A9SCU(pio_addr=0x1f000000) 141 cf_ctrl = IdeController(disks=[], pci_func=0, pci_dev=0, pci_bus=0, 142 io_shift = 1, ctrl_offset = 2, Command = 0x1, 143 BAR0 = 0x18000000, BAR0Size = '16B', 144 BAR1 = 0x18000100, BAR1Size = '1B', 145 BAR0LegacyIO = True, BAR1LegacyIO = True) 146 147 148 l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff) 149 flash_fake = IsaFake(pio_addr=0x40000000, pio_size=0x20000000, 150 fake_mem=True) 151 dmac_fake = AmbaFake(pio_addr=0x10030000) 152 uart1_fake = AmbaFake(pio_addr=0x1000a000) 153 uart2_fake = AmbaFake(pio_addr=0x1000b000) 154 uart3_fake = AmbaFake(pio_addr=0x1000c000) 155 smc_fake = AmbaFake(pio_addr=0x100e1000) 156 sp810_fake = AmbaFake(pio_addr=0x10001000, ignore_access=True) 157 watchdog_fake = AmbaFake(pio_addr=0x10010000) 158 gpio0_fake = AmbaFake(pio_addr=0x10013000) 159 gpio1_fake = AmbaFake(pio_addr=0x10014000) 160 gpio2_fake = AmbaFake(pio_addr=0x10015000) 161 ssp_fake = AmbaFake(pio_addr=0x1000d000) 162 sci_fake = AmbaFake(pio_addr=0x1000e000) 163 aaci_fake = AmbaFake(pio_addr=0x10004000) 164 mmc_fake = AmbaFake(pio_addr=0x10005000) 165 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031) 166 167 168 # Attach I/O devices that are on chip 169 def attachOnChipIO(self, bus): 170 self.gic.pio = bus.port 171 self.l2x0_fake.pio = bus.port 172 self.a9scu.pio = bus.port 173 174 # Attach I/O devices to specified bus object. Can't do this 175 # earlier, since the bus object itself is typically defined at the 176 # System level. 177 def attachIO(self, bus): 178 self.uart.pio = bus.port 179 self.realview_io.pio = bus.port 180 self.timer0.pio = bus.port 181 self.timer1.pio = bus.port 182 self.clcd.pio = bus.port 183 self.kmi0.pio = bus.port 184 self.kmi1.pio = bus.port 185 self.cf_ctrl.pio = bus.port 186 self.dmac_fake.pio = bus.port 187 self.uart1_fake.pio = bus.port 188 self.uart2_fake.pio = bus.port 189 self.uart3_fake.pio = bus.port 190 self.smc_fake.pio = bus.port 191 self.sp810_fake.pio = bus.port 192 self.watchdog_fake.pio = bus.port 193 self.gpio0_fake.pio = bus.port 194 self.gpio1_fake.pio = bus.port 195 self.gpio2_fake.pio = bus.port 196 self.ssp_fake.pio = bus.port 197 self.sci_fake.pio = bus.port 198 self.aaci_fake.pio = bus.port 199 self.mmc_fake.pio = bus.port 200 self.rtc_fake.pio = bus.port 201 self.flash_fake.pio = bus.port 202 203# Reference for memory map and interrupt number 204# RealView Emulation Baseboard User Guide (ARM DUI 0143B) 205# Chapter 4: Programmer's Reference 206class RealViewEB(RealView): 207 uart = Pl011(pio_addr=0x10009000, int_num=44) 208 realview_io = RealViewCtrl(pio_addr=0x10000000) 209 gic = Gic(dist_addr=0x10041000, cpu_addr=0x10040000) 210 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000) 211 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000) 212 clcd = Pl111(pio_addr=0x10020000, int_num=23) 213 kmi0 = Pl050(pio_addr=0x10006000, int_num=20) 214 kmi1 = Pl050(pio_addr=0x10007000, int_num=21, is_mouse=True) 215 216 l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff, warn_access="1") 217 flash_fake = IsaFake(pio_addr=0x40000000, pio_size=0x20000000-1, 218 fake_mem=True) 219 dmac_fake = AmbaFake(pio_addr=0x10030000) 220 uart1_fake = AmbaFake(pio_addr=0x1000a000) 221 uart2_fake = AmbaFake(pio_addr=0x1000b000) 222 uart3_fake = AmbaFake(pio_addr=0x1000c000) 223 smcreg_fake = IsaFake(pio_addr=0x10080000, pio_size=0x10000-1) 224 smc_fake = AmbaFake(pio_addr=0x100e1000) 225 sp810_fake = AmbaFake(pio_addr=0x10001000, ignore_access=True) 226 watchdog_fake = AmbaFake(pio_addr=0x10010000) 227 gpio0_fake = AmbaFake(pio_addr=0x10013000) 228 gpio1_fake = AmbaFake(pio_addr=0x10014000) 229 gpio2_fake = AmbaFake(pio_addr=0x10015000) 230 ssp_fake = AmbaFake(pio_addr=0x1000d000) 231 sci_fake = AmbaFake(pio_addr=0x1000e000) 232 aaci_fake = AmbaFake(pio_addr=0x10004000) 233 mmc_fake = AmbaFake(pio_addr=0x10005000) 234 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031) 235 236 237 238 # Attach I/O devices that are on chip 239 def attachOnChipIO(self, bus): 240 self.gic.pio = bus.port 241 self.l2x0_fake.pio = bus.port 242 243 # Attach I/O devices to specified bus object. Can't do this 244 # earlier, since the bus object itself is typically defined at the 245 # System level. 246 def attachIO(self, bus): 247 self.uart.pio = bus.port 248 self.realview_io.pio = bus.port 249 self.timer0.pio = bus.port 250 self.timer1.pio = bus.port 251 self.clcd.pio = bus.port 252 self.kmi0.pio = bus.port 253 self.kmi1.pio = bus.port 254 self.dmac_fake.pio = bus.port 255 self.uart1_fake.pio = bus.port 256 self.uart2_fake.pio = bus.port 257 self.uart3_fake.pio = bus.port 258 self.smc_fake.pio = bus.port 259 self.sp810_fake.pio = bus.port 260 self.watchdog_fake.pio = bus.port 261 self.gpio0_fake.pio = bus.port 262 self.gpio1_fake.pio = bus.port 263 self.gpio2_fake.pio = bus.port 264 self.ssp_fake.pio = bus.port 265 self.sci_fake.pio = bus.port 266 self.aaci_fake.pio = bus.port 267 self.mmc_fake.pio = bus.port 268 self.rtc_fake.pio = bus.port 269 self.flash_fake.pio = bus.port 270 self.smcreg_fake.pio = bus.port 271 272