RealView.py revision 8212
1# Copyright (c) 2009 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Copyright (c) 2006-2007 The Regents of The University of Michigan 14# All rights reserved. 15# 16# Redistribution and use in source and binary forms, with or without 17# modification, are permitted provided that the following conditions are 18# met: redistributions of source code must retain the above copyright 19# notice, this list of conditions and the following disclaimer; 20# redistributions in binary form must reproduce the above copyright 21# notice, this list of conditions and the following disclaimer in the 22# documentation and/or other materials provided with the distribution; 23# neither the name of the copyright holders nor the names of its 24# contributors may be used to endorse or promote products derived from 25# this software without specific prior written permission. 26# 27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 30# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 32# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38# 39# Authors: Ali Saidi 40# Gabe Black 41# William Wang 42 43from m5.params import * 44from m5.proxy import * 45from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr, DmaDevice 46from Ide import * 47from Platform import Platform 48from Terminal import Terminal 49from Uart import Uart 50 51class AmbaDevice(BasicPioDevice): 52 type = 'AmbaDevice' 53 abstract = True 54 amba_id = Param.UInt32("ID of AMBA device for kernel detection") 55 56class AmbaIntDevice(AmbaDevice): 57 type = 'AmbaIntDevice' 58 abstract = True 59 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 60 int_num = Param.UInt32("Interrupt number that connects to GIC") 61 int_delay = Param.Latency("100ns", 62 "Time between action and interrupt generation by device") 63 64class AmbaDmaDevice(DmaDevice): 65 type = 'AmbaDmaDevice' 66 abstract = True 67 pio_addr = Param.Addr("Address for AMBA slave interface") 68 pio_latency = Param.Latency("10ns", "Time between action and write/read result by AMBA DMA Device") 69 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 70 int_num = Param.UInt32("Interrupt number that connects to GIC") 71 amba_id = Param.UInt32("ID of AMBA device for kernel detection") 72 73class RealViewCtrl(BasicPioDevice): 74 type = 'RealViewCtrl' 75 proc_id = Param.UInt32(0x0C000000, "Platform ID") 76 77class Gic(PioDevice): 78 type = 'Gic' 79 dist_addr = Param.Addr(0x1f001000, "Address for distributor") 80 cpu_addr = Param.Addr(0x1f000100, "Address for cpu") 81 dist_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to distributor") 82 cpu_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to cpu") 83 it_lines = Param.UInt32(128, "Number of interrupt lines supported (max = 1020)") 84 85class AmbaFake(AmbaDevice): 86 type = 'AmbaFake' 87 ignore_access = Param.Bool(False, "Ignore reads/writes to this device, (e.g. IsaFake + AMBA)") 88 amba_id = 0; 89 90class Pl011(Uart): 91 type = 'Pl011' 92 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 93 int_num = Param.UInt32("Interrupt number that connects to GIC") 94 end_on_eot = Param.Bool(False, "End the simulation when a EOT is received on the UART") 95 int_delay = Param.Latency("100ns", "Time between action and interrupt generation by UART") 96 97class Sp804(AmbaDevice): 98 type = 'Sp804' 99 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 100 int_num0 = Param.UInt32("Interrupt number that connects to GIC") 101 clock0 = Param.Clock('1MHz', "Clock speed of the input") 102 int_num1 = Param.UInt32("Interrupt number that connects to GIC") 103 clock1 = Param.Clock('1MHz', "Clock speed of the input") 104 amba_id = 0x00141804 105 106class Pl050(AmbaIntDevice): 107 type = 'Pl050' 108 vnc = Param.VncServer(Parent.any, "Vnc server for remote frame buffer display") 109 is_mouse = Param.Bool(False, "Is this interface a mouse, if not a keyboard") 110 int_delay = '1us' 111 amba_id = 0x00141050 112 113class Pl111(AmbaDmaDevice): 114 type = 'Pl111' 115 clock = Param.Clock('24MHz', "Clock speed of the input") 116 vnc = Param.VncServer(Parent.any, "Vnc server for remote frame buffer display") 117 amba_id = 0x00141111 118 119class RealView(Platform): 120 type = 'RealView' 121 system = Param.System(Parent.any, "system") 122 123# Reference for memory map and interrupt number 124# RealView Platform Baseboard Explore for Cortex-A9 User Guide(ARM DUI 0440A) 125# Chapter 4: Programmer's Reference 126class RealViewPBX(RealView): 127 uart = Pl011(pio_addr=0x10009000, int_num=44) 128 realview_io = RealViewCtrl(pio_addr=0x10000000) 129 gic = Gic() 130 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000) 131 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000) 132 clcd = Pl111(pio_addr=0x10020000, int_num=55) 133 kmi0 = Pl050(pio_addr=0x10006000, int_num=52) 134 kmi1 = Pl050(pio_addr=0x10007000, int_num=53, is_mouse=True) 135 cf_ctrl = IdeController(disks=[], pci_func=0, pci_dev=0, pci_bus=0, 136 io_shift = 1, ctrl_offset = 2, Command = 0x1, 137 BAR0 = 0x18000000, BAR0Size = '16B', 138 BAR1 = 0x18000100, BAR1Size = '1B', 139 BAR0LegacyIO = True, BAR1LegacyIO = True) 140 141 142 l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff) 143 flash_fake = IsaFake(pio_addr=0x40000000, pio_size=0x4000000) 144 dmac_fake = AmbaFake(pio_addr=0x10030000) 145 uart1_fake = AmbaFake(pio_addr=0x1000a000) 146 uart2_fake = AmbaFake(pio_addr=0x1000b000) 147 uart3_fake = AmbaFake(pio_addr=0x1000c000) 148 smc_fake = AmbaFake(pio_addr=0x100e1000) 149 sp810_fake = AmbaFake(pio_addr=0x10001000, ignore_access=True) 150 watchdog_fake = AmbaFake(pio_addr=0x10010000) 151 gpio0_fake = AmbaFake(pio_addr=0x10013000) 152 gpio1_fake = AmbaFake(pio_addr=0x10014000) 153 gpio2_fake = AmbaFake(pio_addr=0x10015000) 154 ssp_fake = AmbaFake(pio_addr=0x1000d000) 155 sci_fake = AmbaFake(pio_addr=0x1000e000) 156 aaci_fake = AmbaFake(pio_addr=0x10004000) 157 mmc_fake = AmbaFake(pio_addr=0x10005000) 158 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031) 159 160 161 # Attach I/O devices that are on chip 162 def attachOnChipIO(self, bus): 163 self.gic.pio = bus.port 164 self.l2x0_fake.pio = bus.port 165 166 # Attach I/O devices to specified bus object. Can't do this 167 # earlier, since the bus object itself is typically defined at the 168 # System level. 169 def attachIO(self, bus): 170 self.uart.pio = bus.port 171 self.realview_io.pio = bus.port 172 self.timer0.pio = bus.port 173 self.timer1.pio = bus.port 174 self.clcd.pio = bus.port 175 self.kmi0.pio = bus.port 176 self.kmi1.pio = bus.port 177 self.cf_ctrl.pio = bus.port 178 self.dmac_fake.pio = bus.port 179 self.uart1_fake.pio = bus.port 180 self.uart2_fake.pio = bus.port 181 self.uart3_fake.pio = bus.port 182 self.smc_fake.pio = bus.port 183 self.sp810_fake.pio = bus.port 184 self.watchdog_fake.pio = bus.port 185 self.gpio0_fake.pio = bus.port 186 self.gpio1_fake.pio = bus.port 187 self.gpio2_fake.pio = bus.port 188 self.ssp_fake.pio = bus.port 189 self.sci_fake.pio = bus.port 190 self.aaci_fake.pio = bus.port 191 self.mmc_fake.pio = bus.port 192 self.rtc_fake.pio = bus.port 193 self.flash_fake.pio = bus.port 194 195# Reference for memory map and interrupt number 196# RealView Emulation Baseboard User Guide (ARM DUI 0143B) 197# Chapter 4: Programmer's Reference 198class RealViewEB(RealView): 199 uart = Pl011(pio_addr=0x10009000, int_num=44) 200 realview_io = RealViewCtrl(pio_addr=0x10000000) 201 gic = Gic(dist_addr=0x10041000, cpu_addr=0x10040000) 202 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000) 203 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000) 204 clcd = Pl111(pio_addr=0x10020000, int_num=23) 205 kmi0 = Pl050(pio_addr=0x10006000, int_num=20) 206 kmi1 = Pl050(pio_addr=0x10007000, int_num=21, is_mouse=True) 207 208 l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff, warn_access="1") 209 dmac_fake = AmbaFake(pio_addr=0x10030000) 210 uart1_fake = AmbaFake(pio_addr=0x1000a000) 211 uart2_fake = AmbaFake(pio_addr=0x1000b000) 212 uart3_fake = AmbaFake(pio_addr=0x1000c000) 213 smc_fake = AmbaFake(pio_addr=0x100e1000) 214 sp810_fake = AmbaFake(pio_addr=0x10001000, ignore_access=True) 215 watchdog_fake = AmbaFake(pio_addr=0x10010000) 216 gpio0_fake = AmbaFake(pio_addr=0x10013000) 217 gpio1_fake = AmbaFake(pio_addr=0x10014000) 218 gpio2_fake = AmbaFake(pio_addr=0x10015000) 219 ssp_fake = AmbaFake(pio_addr=0x1000d000) 220 sci_fake = AmbaFake(pio_addr=0x1000e000) 221 aaci_fake = AmbaFake(pio_addr=0x10004000) 222 mmc_fake = AmbaFake(pio_addr=0x10005000) 223 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031) 224 225 226 227 # Attach I/O devices that are on chip 228 def attachOnChipIO(self, bus): 229 self.gic.pio = bus.port 230 self.l2x0_fake.pio = bus.port 231 232 # Attach I/O devices to specified bus object. Can't do this 233 # earlier, since the bus object itself is typically defined at the 234 # System level. 235 def attachIO(self, bus): 236 self.uart.pio = bus.port 237 self.realview_io.pio = bus.port 238 self.timer0.pio = bus.port 239 self.timer1.pio = bus.port 240 self.clcd.pio = bus.port 241 self.kmi0.pio = bus.port 242 self.kmi1.pio = bus.port 243 self.dmac_fake.pio = bus.port 244 self.uart1_fake.pio = bus.port 245 self.uart2_fake.pio = bus.port 246 self.uart3_fake.pio = bus.port 247 self.smc_fake.pio = bus.port 248 self.sp810_fake.pio = bus.port 249 self.watchdog_fake.pio = bus.port 250 self.gpio0_fake.pio = bus.port 251 self.gpio1_fake.pio = bus.port 252 self.gpio2_fake.pio = bus.port 253 self.ssp_fake.pio = bus.port 254 self.sci_fake.pio = bus.port 255 self.aaci_fake.pio = bus.port 256 self.mmc_fake.pio = bus.port 257 self.rtc_fake.pio = bus.port 258 259