RealView.py revision 7754
1# Copyright (c) 2009 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Copyright (c) 2006-2007 The Regents of The University of Michigan 14# All rights reserved. 15# 16# Redistribution and use in source and binary forms, with or without 17# modification, are permitted provided that the following conditions are 18# met: redistributions of source code must retain the above copyright 19# notice, this list of conditions and the following disclaimer; 20# redistributions in binary form must reproduce the above copyright 21# notice, this list of conditions and the following disclaimer in the 22# documentation and/or other materials provided with the distribution; 23# neither the name of the copyright holders nor the names of its 24# contributors may be used to endorse or promote products derived from 25# this software without specific prior written permission. 26# 27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 30# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 32# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38# 39# Authors: Ali Saidi 40# Gabe Black 41# William Wang 42 43from m5.params import * 44from m5.proxy import * 45from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr, DmaDevice 46from Platform import Platform 47from Terminal import Terminal 48from Uart import Uart 49 50class AmbaDevice(BasicPioDevice): 51 type = 'AmbaDevice' 52 abstract = True 53 amba_id = Param.UInt32("ID of AMBA device for kernel detection") 54 55class AmbaDmaDevice(DmaDevice): 56 type = 'AmbaDmaDevice' 57 abstract = True 58 pio_addr = Param.Addr("Address for AMBA slave interface") 59 pio_latency = Param.Latency("10ns", "Time between action and write/read result by AMBA DMA Device") 60 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 61 int_num = Param.UInt32("Interrupt number that connects to GIC") 62 amba_id = Param.UInt32("ID of AMBA device for kernel detection") 63 64class RealViewCtrl(BasicPioDevice): 65 type = 'RealViewCtrl' 66 proc_id = Param.UInt32(0x0C000000, "Platform ID") 67 68class Gic(PioDevice): 69 type = 'Gic' 70 dist_addr = Param.Addr(0x1f001000, "Address for distributor") 71 cpu_addr = Param.Addr(0x1f000100, "Address for cpu") 72 dist_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to distributor") 73 cpu_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to cpu") 74 it_lines = Param.UInt32(128, "Number of interrupt lines supported (max = 1020)") 75 76class AmbaFake(AmbaDevice): 77 type = 'AmbaFake' 78 ignore_access = Param.Bool(False, "Ignore reads/writes to this device, (e.g. IsaFake + AMBA)") 79 amba_id = 0; 80 81class Pl011(Uart): 82 type = 'Pl011' 83 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 84 int_num = Param.UInt32("Interrupt number that connects to GIC") 85 end_on_eot = Param.Bool(False, "End the simulation when a EOT is received on the UART") 86 int_delay = Param.Latency("100ns", "Time between action and interrupt generation by UART") 87 88class Sp804(AmbaDevice): 89 type = 'Sp804' 90 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 91 int_num0 = Param.UInt32("Interrupt number that connects to GIC") 92 clock0 = Param.Clock('1MHz', "Clock speed of the input") 93 int_num1 = Param.UInt32("Interrupt number that connects to GIC") 94 clock1 = Param.Clock('1MHz', "Clock speed of the input") 95 amba_id = 0x00141804 96 97class Pl050(AmbaDevice): 98 type = 'Pl050' 99 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 100 int_num = Param.UInt32("Interrupt number that connects to GIC") 101 int_delay = Param.Latency("100ns", "Time between action and interrupt generation by UART") 102 amba_id = 0x00141050 103 104class Pl111(AmbaDmaDevice): 105 type = 'Pl111' 106 clock = Param.Clock('24MHz', "Clock speed of the input") 107 amba_id = 0x00141111 108 109class RealView(Platform): 110 type = 'RealView' 111 system = Param.System(Parent.any, "system") 112 113# Reference for memory map and interrupt number 114# RealView Platform Baseboard Explore for Cortex-A9 User Guide(ARM DUI 0440A) 115# Chapter 4: Programmer's Reference 116class RealViewPBX(RealView): 117 uart = Pl011(pio_addr=0x10009000, int_num=44) 118 realview_io = RealViewCtrl(pio_addr=0x10000000) 119 gic = Gic() 120 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000) 121 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000) 122 clcd = Pl111(pio_addr=0x10020000, int_num=55) 123 kmi0 = Pl050(pio_addr=0x10006000, int_num=52) 124 kmi1 = Pl050(pio_addr=0x10007000, int_num=53) 125 126 l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff) 127 flash_fake = IsaFake(pio_addr=0x40000000, pio_size=0x4000000) 128 dmac_fake = AmbaFake(pio_addr=0x10030000) 129 uart1_fake = AmbaFake(pio_addr=0x1000a000) 130 uart2_fake = AmbaFake(pio_addr=0x1000b000) 131 uart3_fake = AmbaFake(pio_addr=0x1000c000) 132 smc_fake = AmbaFake(pio_addr=0x100e1000) 133 sp810_fake = AmbaFake(pio_addr=0x10001000, ignore_access=True) 134 watchdog_fake = AmbaFake(pio_addr=0x10010000) 135 gpio0_fake = AmbaFake(pio_addr=0x10013000) 136 gpio1_fake = AmbaFake(pio_addr=0x10014000) 137 gpio2_fake = AmbaFake(pio_addr=0x10015000) 138 ssp_fake = AmbaFake(pio_addr=0x1000d000) 139 sci_fake = AmbaFake(pio_addr=0x1000e000) 140 aaci_fake = AmbaFake(pio_addr=0x10004000) 141 mmc_fake = AmbaFake(pio_addr=0x10005000) 142 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031) 143 144 145 146 # Attach I/O devices that are on chip 147 def attachOnChipIO(self, bus): 148 self.gic.pio = bus.port 149 self.l2x0_fake.pio = bus.port 150 151 # Attach I/O devices to specified bus object. Can't do this 152 # earlier, since the bus object itself is typically defined at the 153 # System level. 154 def attachIO(self, bus): 155 self.uart.pio = bus.port 156 self.realview_io.pio = bus.port 157 self.timer0.pio = bus.port 158 self.timer1.pio = bus.port 159 self.clcd.pio = bus.port 160 self.kmi0.pio = bus.port 161 self.kmi1.pio = bus.port 162 self.dmac_fake.pio = bus.port 163 self.uart1_fake.pio = bus.port 164 self.uart2_fake.pio = bus.port 165 self.uart3_fake.pio = bus.port 166 self.smc_fake.pio = bus.port 167 self.sp810_fake.pio = bus.port 168 self.watchdog_fake.pio = bus.port 169 self.gpio0_fake.pio = bus.port 170 self.gpio1_fake.pio = bus.port 171 self.gpio2_fake.pio = bus.port 172 self.ssp_fake.pio = bus.port 173 self.sci_fake.pio = bus.port 174 self.aaci_fake.pio = bus.port 175 self.mmc_fake.pio = bus.port 176 self.rtc_fake.pio = bus.port 177 self.flash_fake.pio = bus.port 178 179# Reference for memory map and interrupt number 180# RealView Emulation Baseboard User Guide (ARM DUI 0143B) 181# Chapter 4: Programmer's Reference 182class RealViewEB(RealView): 183 uart = Pl011(pio_addr=0x10009000, int_num=44) 184 realview_io = RealViewCtrl(pio_addr=0x10000000) 185 gic = Gic(dist_addr=0x10041000, cpu_addr=0x10040000) 186 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000) 187 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000) 188 clcd = Pl111(pio_addr=0x10020000, int_num=23) 189 kmi0 = Pl050(pio_addr=0x10006000, int_num=20) 190 kmi1 = Pl050(pio_addr=0x10007000, int_num=21) 191 192 l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff, warn_access="1") 193 dmac_fake = AmbaFake(pio_addr=0x10030000) 194 uart1_fake = AmbaFake(pio_addr=0x1000a000) 195 uart2_fake = AmbaFake(pio_addr=0x1000b000) 196 uart3_fake = AmbaFake(pio_addr=0x1000c000) 197 smc_fake = AmbaFake(pio_addr=0x100e1000) 198 sp810_fake = AmbaFake(pio_addr=0x10001000, ignore_access=True) 199 watchdog_fake = AmbaFake(pio_addr=0x10010000) 200 gpio0_fake = AmbaFake(pio_addr=0x10013000) 201 gpio1_fake = AmbaFake(pio_addr=0x10014000) 202 gpio2_fake = AmbaFake(pio_addr=0x10015000) 203 ssp_fake = AmbaFake(pio_addr=0x1000d000) 204 sci_fake = AmbaFake(pio_addr=0x1000e000) 205 aaci_fake = AmbaFake(pio_addr=0x10004000) 206 mmc_fake = AmbaFake(pio_addr=0x10005000) 207 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031) 208 209 210 211 # Attach I/O devices that are on chip 212 def attachOnChipIO(self, bus): 213 self.gic.pio = bus.port 214 self.l2x0_fake.pio = bus.port 215 216 # Attach I/O devices to specified bus object. Can't do this 217 # earlier, since the bus object itself is typically defined at the 218 # System level. 219 def attachIO(self, bus): 220 self.uart.pio = bus.port 221 self.realview_io.pio = bus.port 222 self.timer0.pio = bus.port 223 self.timer1.pio = bus.port 224 self.clcd.pio = bus.port 225 self.kmi0.pio = bus.port 226 self.kmi1.pio = bus.port 227 self.dmac_fake.pio = bus.port 228 self.uart1_fake.pio = bus.port 229 self.uart2_fake.pio = bus.port 230 self.uart3_fake.pio = bus.port 231 self.smc_fake.pio = bus.port 232 self.sp810_fake.pio = bus.port 233 self.watchdog_fake.pio = bus.port 234 self.gpio0_fake.pio = bus.port 235 self.gpio1_fake.pio = bus.port 236 self.gpio2_fake.pio = bus.port 237 self.ssp_fake.pio = bus.port 238 self.sci_fake.pio = bus.port 239 self.aaci_fake.pio = bus.port 240 self.mmc_fake.pio = bus.port 241 self.rtc_fake.pio = bus.port 242 243