tsunami_io.cc revision 9808:13ffc0066b76
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ali Saidi 29 * Andrew Schultz 30 * Miguel Serrano 31 */ 32 33/** @file 34 * Tsunami I/O including PIC, PIT, RTC, DMA 35 */ 36 37#include <sys/time.h> 38 39#include <deque> 40#include <string> 41#include <vector> 42 43#include "base/time.hh" 44#include "base/trace.hh" 45#include "config/the_isa.hh" 46#include "debug/Tsunami.hh" 47#include "dev/alpha/tsunami.hh" 48#include "dev/alpha/tsunami_cchip.hh" 49#include "dev/alpha/tsunami_io.hh" 50#include "dev/alpha/tsunamireg.h" 51#include "dev/rtcreg.h" 52#include "mem/packet.hh" 53#include "mem/packet_access.hh" 54#include "mem/port.hh" 55#include "sim/system.hh" 56 57// clang complains about std::set being overloaded with Packet::set if 58// we open up the entire namespace std 59using std::string; 60using std::ostream; 61 62//Should this be AlphaISA? 63using namespace TheISA; 64 65TsunamiIO::RTC::RTC(const string &n, const TsunamiIOParams *p) 66 : MC146818(p->tsunami, n, p->time, p->year_is_bcd, p->frequency), 67 tsunami(p->tsunami) 68{ 69} 70 71TsunamiIO::TsunamiIO(const Params *p) 72 : BasicPioDevice(p, 0x100), tsunami(p->tsunami), 73 pitimer(this, p->name + "pitimer"), rtc(p->name + ".rtc", p) 74{ 75 // set the back pointer from tsunami to myself 76 tsunami->io = this; 77 78 timerData = 0; 79 picr = 0; 80 picInterrupting = false; 81} 82 83Tick 84TsunamiIO::frequency() const 85{ 86 return SimClock::Frequency / params()->frequency; 87} 88 89Tick 90TsunamiIO::read(PacketPtr pkt) 91{ 92 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 93 94 Addr daddr = pkt->getAddr() - pioAddr; 95 96 DPRINTF(Tsunami, "io read va=%#x size=%d IOPorrt=%#x\n", pkt->getAddr(), 97 pkt->getSize(), daddr); 98 99 pkt->allocate(); 100 101 if (pkt->getSize() == sizeof(uint8_t)) { 102 switch(daddr) { 103 // PIC1 mask read 104 case TSDEV_PIC1_MASK: 105 pkt->set(~mask1); 106 break; 107 case TSDEV_PIC2_MASK: 108 pkt->set(~mask2); 109 break; 110 case TSDEV_PIC1_ISR: 111 // !!! If this is modified 64bit case needs to be too 112 // Pal code has to do a 64 bit physical read because there is 113 // no load physical byte instruction 114 pkt->set(picr); 115 break; 116 case TSDEV_PIC2_ISR: 117 // PIC2 not implemnted... just return 0 118 pkt->set(0x00); 119 break; 120 case TSDEV_TMR0_DATA: 121 pkt->set(pitimer.readCounter(0)); 122 break; 123 case TSDEV_TMR1_DATA: 124 pkt->set(pitimer.readCounter(1)); 125 break; 126 case TSDEV_TMR2_DATA: 127 pkt->set(pitimer.readCounter(2)); 128 break; 129 case TSDEV_RTC_DATA: 130 pkt->set(rtc.readData(rtcAddr)); 131 break; 132 case TSDEV_CTRL_PORTB: 133 if (pitimer.outputHigh(2)) 134 pkt->set(PORTB_SPKR_HIGH); 135 else 136 pkt->set(0x00); 137 break; 138 default: 139 panic("I/O Read - va%#x size %d\n", pkt->getAddr(), pkt->getSize()); 140 } 141 } else if (pkt->getSize() == sizeof(uint64_t)) { 142 if (daddr == TSDEV_PIC1_ISR) 143 pkt->set<uint64_t>(picr); 144 else 145 panic("I/O Read - invalid addr - va %#x size %d\n", 146 pkt->getAddr(), pkt->getSize()); 147 } else { 148 panic("I/O Read - invalid size - va %#x size %d\n", pkt->getAddr(), pkt->getSize()); 149 } 150 pkt->makeAtomicResponse(); 151 return pioDelay; 152} 153 154Tick 155TsunamiIO::write(PacketPtr pkt) 156{ 157 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 158 Addr daddr = pkt->getAddr() - pioAddr; 159 160 DPRINTF(Tsunami, "io write - va=%#x size=%d IOPort=%#x Data=%#x\n", 161 pkt->getAddr(), pkt->getSize(), pkt->getAddr() & 0xfff, (uint32_t)pkt->get<uint8_t>()); 162 163 assert(pkt->getSize() == sizeof(uint8_t)); 164 165 switch(daddr) { 166 case TSDEV_PIC1_MASK: 167 mask1 = ~(pkt->get<uint8_t>()); 168 if ((picr & mask1) && !picInterrupting) { 169 picInterrupting = true; 170 tsunami->cchip->postDRIR(55); 171 DPRINTF(Tsunami, "posting pic interrupt to cchip\n"); 172 } 173 if ((!(picr & mask1)) && picInterrupting) { 174 picInterrupting = false; 175 tsunami->cchip->clearDRIR(55); 176 DPRINTF(Tsunami, "clearing pic interrupt\n"); 177 } 178 break; 179 case TSDEV_PIC2_MASK: 180 mask2 = pkt->get<uint8_t>(); 181 //PIC2 Not implemented to interrupt 182 break; 183 case TSDEV_PIC1_ACK: 184 // clear the interrupt on the PIC 185 picr &= ~(1 << (pkt->get<uint8_t>() & 0xF)); 186 if (!(picr & mask1)) 187 tsunami->cchip->clearDRIR(55); 188 break; 189 case TSDEV_DMA1_MODE: 190 mode1 = pkt->get<uint8_t>(); 191 break; 192 case TSDEV_DMA2_MODE: 193 mode2 = pkt->get<uint8_t>(); 194 break; 195 case TSDEV_TMR0_DATA: 196 pitimer.writeCounter(0, pkt->get<uint8_t>()); 197 break; 198 case TSDEV_TMR1_DATA: 199 pitimer.writeCounter(1, pkt->get<uint8_t>()); 200 break; 201 case TSDEV_TMR2_DATA: 202 pitimer.writeCounter(2, pkt->get<uint8_t>()); 203 break; 204 case TSDEV_TMR_CTRL: 205 pitimer.writeControl(pkt->get<uint8_t>()); 206 break; 207 case TSDEV_RTC_ADDR: 208 rtcAddr = pkt->get<uint8_t>(); 209 break; 210 case TSDEV_RTC_DATA: 211 rtc.writeData(rtcAddr, pkt->get<uint8_t>()); 212 break; 213 case TSDEV_KBD: 214 case TSDEV_DMA1_CMND: 215 case TSDEV_DMA2_CMND: 216 case TSDEV_DMA1_MMASK: 217 case TSDEV_DMA2_MMASK: 218 case TSDEV_PIC2_ACK: 219 case TSDEV_DMA1_RESET: 220 case TSDEV_DMA2_RESET: 221 case TSDEV_DMA1_MASK: 222 case TSDEV_DMA2_MASK: 223 case TSDEV_CTRL_PORTB: 224 break; 225 default: 226 panic("I/O Write - va%#x size %d data %#x\n", pkt->getAddr(), pkt->getSize(), pkt->get<uint8_t>()); 227 } 228 229 pkt->makeAtomicResponse(); 230 return pioDelay; 231} 232 233void 234TsunamiIO::postPIC(uint8_t bitvector) 235{ 236 //PIC2 Is not implemented, because nothing of interest there 237 picr |= bitvector; 238 if (picr & mask1) { 239 tsunami->cchip->postDRIR(55); 240 DPRINTF(Tsunami, "posting pic interrupt to cchip\n"); 241 } 242} 243 244void 245TsunamiIO::clearPIC(uint8_t bitvector) 246{ 247 //PIC2 Is not implemented, because nothing of interest there 248 picr &= ~bitvector; 249 if (!(picr & mask1)) { 250 tsunami->cchip->clearDRIR(55); 251 DPRINTF(Tsunami, "clearing pic interrupt to cchip\n"); 252 } 253} 254 255void 256TsunamiIO::serialize(ostream &os) 257{ 258 SERIALIZE_SCALAR(rtcAddr); 259 SERIALIZE_SCALAR(timerData); 260 SERIALIZE_SCALAR(mask1); 261 SERIALIZE_SCALAR(mask2); 262 SERIALIZE_SCALAR(mode1); 263 SERIALIZE_SCALAR(mode2); 264 SERIALIZE_SCALAR(picr); 265 SERIALIZE_SCALAR(picInterrupting); 266 267 // Serialize the timers 268 pitimer.serialize("pitimer", os); 269 rtc.serialize("rtc", os); 270} 271 272void 273TsunamiIO::unserialize(Checkpoint *cp, const string §ion) 274{ 275 UNSERIALIZE_SCALAR(rtcAddr); 276 UNSERIALIZE_SCALAR(timerData); 277 UNSERIALIZE_SCALAR(mask1); 278 UNSERIALIZE_SCALAR(mask2); 279 UNSERIALIZE_SCALAR(mode1); 280 UNSERIALIZE_SCALAR(mode2); 281 UNSERIALIZE_SCALAR(picr); 282 UNSERIALIZE_SCALAR(picInterrupting); 283 284 // Unserialize the timers 285 pitimer.unserialize("pitimer", cp, section); 286 rtc.unserialize("rtc", cp, section); 287} 288 289TsunamiIO * 290TsunamiIOParams::create() 291{ 292 return new TsunamiIO(this); 293} 294