tsunami_cchip.hh revision 777
12207SN/A/* 22207SN/A * Copyright (c) 2003 The Regents of The University of Michigan 32207SN/A * All rights reserved. 42207SN/A * 52207SN/A * Redistribution and use in source and binary forms, with or without 62207SN/A * modification, are permitted provided that the following conditions are 72207SN/A * met: redistributions of source code must retain the above copyright 82207SN/A * notice, this list of conditions and the following disclaimer; 92207SN/A * redistributions in binary form must reproduce the above copyright 102207SN/A * notice, this list of conditions and the following disclaimer in the 112207SN/A * documentation and/or other materials provided with the distribution; 122207SN/A * neither the name of the copyright holders nor the names of its 132207SN/A * contributors may be used to endorse or promote products derived from 142207SN/A * this software without specific prior written permission. 152207SN/A * 162207SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172207SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182207SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192207SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202207SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212207SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222207SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232207SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242207SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252207SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262207SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu */ 282665Ssaidi@eecs.umich.edu 292665Ssaidi@eecs.umich.edu/* @file 302207SN/A * Turbolaser system bus node (processor, memory, or IO) 312207SN/A */ 322972Sgblack@eecs.umich.edu 332207SN/A#ifndef __TSUNAMI_CCHIP_HH__ 348229Snate@binkert.org#define __TSUNAMI_CCHIP_HH__ 352454SN/A 362454SN/A#include "mem/functional_mem/mmap_device.hh" 372680Sktlim@umich.edu#include "dev/tsunami.hh" 388232Snate@binkert.org 395759Shsul@eecs.umich.edu/* 407678Sgblack@eecs.umich.edu * Tsunami CChip 415759Shsul@eecs.umich.edu */ 422474SN/Aclass TsunamiCChip : public MmapDevice 432207SN/A{ 442474SN/A public: 452474SN/A 462474SN/A protected: 475569Snate@binkert.org Tsunami *tsunami; 485569Snate@binkert.org uint64_t dim[Tsunami::Max_CPUs]; 495154Sgblack@eecs.umich.edu uint64_t dir[Tsunami::Max_CPUs]; 502474SN/A bool dirInterrupting[Tsunami::Max_CPUs]; 512474SN/A uint64_t drir; 5210318Sandreas.hansson@arm.com 532474SN/A public: 542474SN/A TsunamiCChip(const std::string &name, Tsunami *t, 552474SN/A Addr addr, Addr mask, MemoryController *mmu); 562474SN/A 572474SN/A virtual Fault read(MemReqPtr req, uint8_t *data); 582474SN/A virtual Fault write(MemReqPtr req, const uint8_t *data); 592474SN/A 602474SN/A void postDRIR(uint64_t bitvector); 612474SN/A void clearDRIR(uint64_t bitvector); 622474SN/A 632474SN/A virtual void serialize(std::ostream &os); 642474SN/A virtual void unserialize(Checkpoint *cp, const std::string §ion); 652474SN/A 662474SN/A uint64_t misc; 672474SN/A bool RTCInterrupting; 685759Shsul@eecs.umich.edu}; 695759Shsul@eecs.umich.edu 705759Shsul@eecs.umich.edu#endif // __TSUNAMI_CCHIP_HH__ 715759Shsul@eecs.umich.edu