tsunami.cc revision 8229:78bf55f23338
111988Sandreas.sandberg@arm.com/*
28840Sandreas.hansson@arm.com * Copyright (c) 2004-2005 The Regents of The University of Michigan
38840Sandreas.hansson@arm.com * All rights reserved.
48840Sandreas.hansson@arm.com *
58840Sandreas.hansson@arm.com * Redistribution and use in source and binary forms, with or without
68840Sandreas.hansson@arm.com * modification, are permitted provided that the following conditions are
78840Sandreas.hansson@arm.com * met: redistributions of source code must retain the above copyright
88840Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer;
98840Sandreas.hansson@arm.com * redistributions in binary form must reproduce the above copyright
108840Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer in the
118840Sandreas.hansson@arm.com * documentation and/or other materials provided with the distribution;
128840Sandreas.hansson@arm.com * neither the name of the copyright holders nor the names of its
132740SN/A * contributors may be used to endorse or promote products derived from
149983Sstever@gmail.com * this software without specific prior written permission.
159983Sstever@gmail.com *
161046SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
171046SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
181046SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
191046SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
201046SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
211046SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
221046SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
231046SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
241046SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
251046SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
261046SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
271046SN/A *
281046SN/A * Authors: Ali Saidi
291046SN/A */
301046SN/A
311046SN/A/** @file
321046SN/A * Implementation of Tsunami platform.
331046SN/A */
341046SN/A
351046SN/A#include <deque>
361046SN/A#include <string>
371046SN/A#include <vector>
381046SN/A
391046SN/A#include "config/the_isa.hh"
402665SN/A#include "cpu/intr_control.hh"
412665SN/A#include "dev/alpha/tsunami.hh"
422665SN/A#include "dev/alpha/tsunami_cchip.hh"
438840Sandreas.hansson@arm.com#include "dev/alpha/tsunami_io.hh"
4411988Sandreas.sandberg@arm.com#include "dev/alpha/tsunami_pchip.hh"
451046SN/A#include "dev/terminal.hh"
4612563Sgabeblack@google.com#include "sim/system.hh"
4712563Sgabeblack@google.com
485766Snate@binkert.orgusing namespace std;
498331Ssteve.reinhardt@amd.com//Should this be AlphaISA?
5011988Sandreas.sandberg@arm.comusing namespace TheISA;
5111988Sandreas.sandberg@arm.com
521438SN/ATsunami::Tsunami(const Params *p)
534762Snate@binkert.org    : Platform(p), system(p->system)
546654Snate@binkert.org{
5511988Sandreas.sandberg@arm.com    // set the back pointer from the system to myself
5612469Sglenn.bergmans@arm.com    system->platform = this;
5712469Sglenn.bergmans@arm.com
5812469Sglenn.bergmans@arm.com    for (int i = 0; i < Tsunami::Max_CPUs; i++)
593102Sstever@eecs.umich.edu        intr_sum_type[i] = 0;
603102Sstever@eecs.umich.edu}
613102Sstever@eecs.umich.edu
623102Sstever@eecs.umich.eduTick
636654Snate@binkert.orgTsunami::intrFrequency()
643102Sstever@eecs.umich.edu{
653102Sstever@eecs.umich.edu    return io->frequency();
667528Ssteve.reinhardt@amd.com}
678839Sandreas.hansson@arm.com
683102Sstever@eecs.umich.eduvoid
696654Snate@binkert.orgTsunami::postConsoleInt()
706654Snate@binkert.org{
71679SN/A    io->postPIC(0x10);
72679SN/A}
73679SN/A
74679SN/Avoid
75679SN/ATsunami::clearConsoleInt()
76679SN/A{
771692SN/A    io->clearPIC(0x10);
78679SN/A}
79679SN/A
80679SN/Avoid
81679SN/ATsunami::postPciInt(int line)
82679SN/A{
83679SN/A    cchip->postDRIR(line);
84679SN/A}
85679SN/A
86679SN/Avoid
87679SN/ATsunami::clearPciInt(int line)
88679SN/A{
89679SN/A    cchip->clearDRIR(line);
90679SN/A}
91679SN/A
921692SN/AAddr
93679SN/ATsunami::pciToDma(Addr pciAddr) const
94679SN/A{
95679SN/A    return pchip->translatePciToDma(pciAddr);
96679SN/A}
97679SN/A
98679SN/A
99679SN/AAddr
100679SN/ATsunami::calcPciConfigAddr(int bus, int dev, int func)
101679SN/A{
102679SN/A   return pchip->calcConfigAddr(bus, dev, func);
103679SN/A}
104679SN/A
105679SN/AAddr
106679SN/ATsunami::calcPciIOAddr(Addr addr)
107679SN/A{
1082740SN/A   return pchip->calcIOAddr(addr);
109679SN/A}
110679SN/A
111679SN/AAddr
1124762Snate@binkert.orgTsunami::calcPciMemAddr(Addr addr)
1134762Snate@binkert.org{
1144762Snate@binkert.org   return pchip->calcMemAddr(addr);
1152738SN/A}
1162738SN/A
1172738SN/Avoid
1189338SAndreas.Sandberg@arm.comTsunami::serialize(std::ostream &os)
1199338SAndreas.Sandberg@arm.com{
1209338SAndreas.Sandberg@arm.com    SERIALIZE_ARRAY(intr_sum_type, Tsunami::Max_CPUs);
1217673Snate@binkert.org}
1227673Snate@binkert.org
1238331Ssteve.reinhardt@amd.comvoid
1248331Ssteve.reinhardt@amd.comTsunami::unserialize(Checkpoint *cp, const std::string &section)
1257673Snate@binkert.org{
12610458Sandreas.hansson@arm.com    UNSERIALIZE_ARRAY(intr_sum_type, Tsunami::Max_CPUs);
12710458Sandreas.hansson@arm.com}
12810458Sandreas.hansson@arm.com
12910458Sandreas.hansson@arm.comTsunami *
13010458Sandreas.hansson@arm.comTsunamiParams::create()
13110458Sandreas.hansson@arm.com{
13210458Sandreas.hansson@arm.com    return new Tsunami(this);
13310458Sandreas.hansson@arm.com}
13410458Sandreas.hansson@arm.com