tsunami.cc revision 1763
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/** @file 30 * Implementation of Tsunami platform. 31 */ 32 33#include <deque> 34#include <string> 35#include <vector> 36 37#include "cpu/intr_control.hh" 38#include "dev/simconsole.hh" 39#include "dev/ide_ctrl.hh" 40#include "dev/tsunami_cchip.hh" 41#include "dev/tsunami_pchip.hh" 42#include "dev/tsunami_io.hh" 43#include "dev/tsunami.hh" 44#include "dev/pciconfigall.hh" 45#include "sim/builder.hh" 46#include "sim/system.hh" 47 48using namespace std; 49 50Tsunami::Tsunami(const string &name, System *s, IntrControl *ic, 51 PciConfigAll *pci) 52 : Platform(name, ic, pci), system(s) 53{ 54 // set the back pointer from the system to myself 55 system->platform = this; 56 57 for (int i = 0; i < Tsunami::Max_CPUs; i++) 58 intr_sum_type[i] = 0; 59} 60 61Tick 62Tsunami::intrFrequency() 63{ 64 return io->frequency(); 65} 66 67void 68Tsunami::postConsoleInt() 69{ 70 io->postPIC(0x10); 71} 72 73void 74Tsunami::clearConsoleInt() 75{ 76 io->clearPIC(0x10); 77} 78 79void 80Tsunami::postPciInt(int line) 81{ 82 cchip->postDRIR(line); 83} 84 85void 86Tsunami::clearPciInt(int line) 87{ 88 cchip->clearDRIR(line); 89} 90 91Addr 92Tsunami::pciToDma(Addr pciAddr) const 93{ 94 return pchip->translatePciToDma(pciAddr); 95} 96 97void 98Tsunami::serialize(std::ostream &os) 99{ 100 SERIALIZE_ARRAY(intr_sum_type, Tsunami::Max_CPUs); 101} 102 103void 104Tsunami::unserialize(Checkpoint *cp, const std::string §ion) 105{ 106 UNSERIALIZE_ARRAY(intr_sum_type, Tsunami::Max_CPUs); 107} 108 109BEGIN_DECLARE_SIM_OBJECT_PARAMS(Tsunami) 110 111 SimObjectParam<System *> system; 112 SimObjectParam<IntrControl *> intrctrl; 113 SimObjectParam<PciConfigAll *> pciconfig; 114 115END_DECLARE_SIM_OBJECT_PARAMS(Tsunami) 116 117BEGIN_INIT_SIM_OBJECT_PARAMS(Tsunami) 118 119 INIT_PARAM(system, "system"), 120 INIT_PARAM(intrctrl, "interrupt controller"), 121 INIT_PARAM(pciconfig, "PCI configuration") 122 123END_INIT_SIM_OBJECT_PARAMS(Tsunami) 124 125CREATE_SIM_OBJECT(Tsunami) 126{ 127 return new Tsunami(getInstanceName(), system, intrctrl, pciconfig); 128} 129 130REGISTER_SIM_OBJECT("Tsunami", Tsunami) 131