tsunami.cc revision 1095
112339Sjason@lowepower.com/* 212339Sjason@lowepower.com * Copyright (c) 2004 The Regents of The University of Michigan 312339Sjason@lowepower.com * All rights reserved. 412339Sjason@lowepower.com * 512339Sjason@lowepower.com * Redistribution and use in source and binary forms, with or without 612339Sjason@lowepower.com * modification, are permitted provided that the following conditions are 712339Sjason@lowepower.com * met: redistributions of source code must retain the above copyright 812339Sjason@lowepower.com * notice, this list of conditions and the following disclaimer; 912339Sjason@lowepower.com * redistributions in binary form must reproduce the above copyright 1012339Sjason@lowepower.com * notice, this list of conditions and the following disclaimer in the 1112339Sjason@lowepower.com * documentation and/or other materials provided with the distribution; 1212339Sjason@lowepower.com * neither the name of the copyright holders nor the names of its 1312339Sjason@lowepower.com * contributors may be used to endorse or promote products derived from 1412339Sjason@lowepower.com * this software without specific prior written permission. 1512339Sjason@lowepower.com * 1612339Sjason@lowepower.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1712339Sjason@lowepower.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1812339Sjason@lowepower.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1912339Sjason@lowepower.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2012339Sjason@lowepower.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2112339Sjason@lowepower.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2212339Sjason@lowepower.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2312339Sjason@lowepower.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2412339Sjason@lowepower.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2512339Sjason@lowepower.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2612339Sjason@lowepower.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2712339Sjason@lowepower.com */ 2812339Sjason@lowepower.com 2912339Sjason@lowepower.com#include <deque> 3012339Sjason@lowepower.com#include <string> 3112339Sjason@lowepower.com#include <vector> 3212339Sjason@lowepower.com 3312339Sjason@lowepower.com#include "cpu/intr_control.hh" 3412339Sjason@lowepower.com#include "dev/simconsole.hh" 3512339Sjason@lowepower.com#include "dev/etherdev.hh" 3612564Sgabeblack@google.com#include "dev/ide_ctrl.hh" 3712564Sgabeblack@google.com#include "dev/tlaser_clock.hh" 3812339Sjason@lowepower.com#include "dev/tsunami_cchip.hh" 3912339Sjason@lowepower.com#include "dev/tsunami_pchip.hh" 4012339Sjason@lowepower.com#include "dev/tsunami_io.hh" 4112339Sjason@lowepower.com#include "dev/tsunami.hh" 4212339Sjason@lowepower.com#include "dev/pciconfigall.hh" 4312339Sjason@lowepower.com#include "sim/builder.hh" 4412339Sjason@lowepower.com#include "sim/system.hh" 4512339Sjason@lowepower.com 4612339Sjason@lowepower.comusing namespace std; 4712339Sjason@lowepower.com 4812339Sjason@lowepower.comTsunami::Tsunami(const string &name, System *s, 4912339Sjason@lowepower.com IntrControl *ic, PciConfigAll *pci, int intr_freq) 5012339Sjason@lowepower.com : Platform(name, ic, pci, intr_freq), system(s) 5112339Sjason@lowepower.com{ 5212339Sjason@lowepower.com // set the back pointer from the system to myself 5312339Sjason@lowepower.com system->platform = this; 5412339Sjason@lowepower.com 5512339Sjason@lowepower.com for (int i = 0; i < Tsunami::Max_CPUs; i++) 5612339Sjason@lowepower.com intr_sum_type[i] = 0; 5712339Sjason@lowepower.com} 5812339Sjason@lowepower.com 5912339Sjason@lowepower.comTick 6012339Sjason@lowepower.comTsunami::intrFrequency() 6112339Sjason@lowepower.com{ 6212339Sjason@lowepower.com return io->frequency(); 6312339Sjason@lowepower.com} 6412339Sjason@lowepower.com 6512339Sjason@lowepower.comvoid 6612339Sjason@lowepower.comTsunami::postConsoleInt() 6712339Sjason@lowepower.com{ 6812339Sjason@lowepower.com io->postPIC(0x10); 6912339Sjason@lowepower.com} 7012339Sjason@lowepower.com 7112339Sjason@lowepower.comvoid 7212339Sjason@lowepower.comTsunami::clearConsoleInt() 7312339Sjason@lowepower.com{ 7412339Sjason@lowepower.com io->clearPIC(0x10); 7512339Sjason@lowepower.com} 7612339Sjason@lowepower.com 7712339Sjason@lowepower.comvoid 7812339Sjason@lowepower.comTsunami::postPciInt(int line) 7912339Sjason@lowepower.com{ 8012339Sjason@lowepower.com this->cchip->postDRIR(line); 8112339Sjason@lowepower.com} 8212339Sjason@lowepower.com 8312339Sjason@lowepower.comvoid 8412339Sjason@lowepower.comTsunami::clearPciInt(int line) 8512339Sjason@lowepower.com{ 8612339Sjason@lowepower.com this->cchip->clearDRIR(line); 8712339Sjason@lowepower.com} 8812339Sjason@lowepower.com 8912339Sjason@lowepower.comvoid 9012339Sjason@lowepower.comTsunami::serialize(std::ostream &os) 9112339Sjason@lowepower.com{ 9212339Sjason@lowepower.com SERIALIZE_ARRAY(intr_sum_type, Tsunami::Max_CPUs); 9312339Sjason@lowepower.com} 9412339Sjason@lowepower.com 9512339Sjason@lowepower.comvoid 9612339Sjason@lowepower.comTsunami::unserialize(Checkpoint *cp, const std::string §ion) 9712339Sjason@lowepower.com{ 9812339Sjason@lowepower.com UNSERIALIZE_ARRAY(intr_sum_type, Tsunami::Max_CPUs); 9912339Sjason@lowepower.com} 10012339Sjason@lowepower.com 10112564Sgabeblack@google.comBEGIN_DECLARE_SIM_OBJECT_PARAMS(Tsunami) 10212339Sjason@lowepower.com 10312564Sgabeblack@google.com SimObjectParam<System *> system; 104 SimObjectParam<SimConsole *> cons; 105 SimObjectParam<IntrControl *> intrctrl; 106 SimObjectParam<PciConfigAll *> pciconfig; 107 Param<int> interrupt_frequency; 108 109END_DECLARE_SIM_OBJECT_PARAMS(Tsunami) 110 111BEGIN_INIT_SIM_OBJECT_PARAMS(Tsunami) 112 113 INIT_PARAM(system, "system"), 114 INIT_PARAM(cons, "system console"), 115 INIT_PARAM(intrctrl, "interrupt controller"), 116 INIT_PARAM(pciconfig, "PCI configuration"), 117 INIT_PARAM_DFLT(interrupt_frequency, "frequency of interrupts", 1024) 118 119END_INIT_SIM_OBJECT_PARAMS(Tsunami) 120 121CREATE_SIM_OBJECT(Tsunami) 122{ 123 return new Tsunami(getInstanceName(), system, intrctrl, pciconfig, 124 interrupt_frequency); 125} 126 127REGISTER_SIM_OBJECT("Tsunami", Tsunami) 128