SConscript revision 9850:87d6b41749e9 
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright
9# notice, this list of conditions and the following disclaimer;
10# redistributions in binary form must reproduce the above copyright
11# notice, this list of conditions and the following disclaimer in the
12# documentation and/or other materials provided with the distribution;
13# neither the name of the copyright holders nor the names of its
14# contributors may be used to endorse or promote products derived from
15# this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28#
29# Authors: Steve Reinhardt
30#          Gabe Black
31
32Import('*')
33
34if env['TARGET_ISA'] == 'null':
35    Return()
36
37SimObject('BadDevice.py')
38SimObject('CopyEngine.py')
39SimObject('Device.py')
40SimObject('DiskImage.py')
41SimObject('Ethernet.py')
42SimObject('Ide.py')
43SimObject('Pci.py')
44SimObject('Platform.py')
45SimObject('SimpleDisk.py')
46SimObject('Terminal.py')
47SimObject('Uart.py')
48
49Source('baddev.cc')
50Source('copy_engine.cc')
51Source('disk_image.cc')
52Source('dma_device.cc')
53Source('etherbus.cc')
54Source('etherdevice.cc')
55Source('etherdump.cc')
56Source('etherint.cc')
57Source('etherlink.cc')
58Source('etherpkt.cc')
59Source('ethertap.cc')
60Source('i8254xGBe.cc')
61Source('ide_ctrl.cc')
62Source('ide_disk.cc')
63Source('intel_8254_timer.cc')
64Source('io_device.cc')
65Source('isa_fake.cc')
66Source('mc146818.cc')
67Source('ns_gige.cc')
68Source('pciconfigall.cc')
69Source('pcidev.cc')
70Source('pktfifo.cc')
71Source('platform.cc')
72Source('ps2.cc')
73Source('simple_disk.cc')
74Source('sinic.cc')
75Source('terminal.cc')
76Source('uart.cc')
77Source('uart8250.cc')
78
79DebugFlag('DiskImageRead')
80DebugFlag('DiskImageWrite')
81DebugFlag('DMA')
82DebugFlag('DMACopyEngine')
83DebugFlag('Ethernet')
84DebugFlag('EthernetCksum')
85DebugFlag('EthernetDMA')
86DebugFlag('EthernetData')
87DebugFlag('EthernetDesc')
88DebugFlag('EthernetEEPROM')
89DebugFlag('EthernetIntr')
90DebugFlag('EthernetPIO')
91DebugFlag('EthernetSM')
92DebugFlag('IdeCtrl')
93DebugFlag('IdeDisk')
94DebugFlag('Intel8254Timer')
95DebugFlag('IsaFake')
96DebugFlag('MC146818')
97DebugFlag('PCIDEV')
98DebugFlag('PciConfigAll')
99DebugFlag('SimpleDisk')
100DebugFlag('SimpleDiskData')
101DebugFlag('Terminal')
102DebugFlag('TerminalVerbose')
103DebugFlag('Uart')
104
105CompoundFlag('DiskImageAll', [ 'DiskImageRead', 'DiskImageWrite' ])
106CompoundFlag('EthernetAll', [ 'Ethernet', 'EthernetPIO', 'EthernetDMA',
107    'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM',
108    'EthernetCksum', 'EthernetEEPROM' ])
109CompoundFlag('EthernetNoData', [ 'Ethernet', 'EthernetPIO', 'EthernetDesc',
110    'EthernetIntr', 'EthernetSM', 'EthernetCksum' ])
111CompoundFlag('IdeAll', [ 'IdeCtrl', 'IdeDisk' ])
112