Device.py revision 10127:00b4e2a1235c 
1# Copyright (c) 2005-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
10# documentation and/or other materials provided with the distribution;
11# neither the name of the copyright holders nor the names of its
12# contributors may be used to endorse or promote products derived from
13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Nathan Binkert
28
29from m5.params import *
30from m5.proxy import *
31from MemObject import MemObject
32
33class PioDevice(MemObject):
34    type = 'PioDevice'
35    cxx_header = "dev/io_device.hh"
36    abstract = True
37    pio = SlavePort("Programmed I/O port")
38    system = Param.System(Parent.any, "System this device is part of")
39
40class BasicPioDevice(PioDevice):
41    type = 'BasicPioDevice'
42    cxx_header = "dev/io_device.hh"
43    abstract = True
44    pio_addr = Param.Addr("Device Address")
45    pio_latency = Param.Latency('100ns', "Programmed IO latency")
46
47class DmaDevice(PioDevice):
48    type = 'DmaDevice'
49    cxx_header = "dev/io_device.hh"
50    abstract = True
51    dma = MasterPort("DMA port")
52
53
54class IsaFake(BasicPioDevice):
55    type = 'IsaFake'
56    cxx_header = "dev/isa_fake.hh"
57    pio_size = Param.Addr(0x8, "Size of address range")
58    ret_data8 = Param.UInt8(0xFF, "Default data to return")
59    ret_data16 = Param.UInt16(0xFFFF, "Default data to return")
60    ret_data32 = Param.UInt32(0xFFFFFFFF, "Default data to return")
61    ret_data64 = Param.UInt64(0xFFFFFFFFFFFFFFFF, "Default data to return")
62    ret_bad_addr = Param.Bool(False, "Return pkt status bad address on access")
63    update_data = Param.Bool(False, "Update the data that is returned on writes")
64    warn_access = Param.String("", "String to print when device is accessed")
65    fake_mem = Param.Bool(False,
66      "Is this device acting like a memory and thus may get a cache line sized req")
67
68class BadAddr(IsaFake):
69    pio_addr = 0
70    ret_bad_addr = Param.Bool(True, "Return pkt status bad address on access")
71
72
73