utils.hh revision 13954
113954Sgiacomo.gabrielli@arm.com/* 213954Sgiacomo.gabrielli@arm.com * Copyright (c) 2017-2018 ARM Limited 313954Sgiacomo.gabrielli@arm.com * All rights reserved 413954Sgiacomo.gabrielli@arm.com * 513954Sgiacomo.gabrielli@arm.com * The license below extends only to copyright in the software and shall 613954Sgiacomo.gabrielli@arm.com * not be construed as granting a license to any other intellectual 713954Sgiacomo.gabrielli@arm.com * property including but not limited to intellectual property relating 813954Sgiacomo.gabrielli@arm.com * to a hardware implementation of the functionality of the software 913954Sgiacomo.gabrielli@arm.com * licensed hereunder. You may use the software subject to the license 1013954Sgiacomo.gabrielli@arm.com * terms below provided that you ensure that this notice is replicated 1113954Sgiacomo.gabrielli@arm.com * unmodified and in its entirety in all distributions of the software, 1213954Sgiacomo.gabrielli@arm.com * modified or unmodified, in source code or in binary form. 1313954Sgiacomo.gabrielli@arm.com * 1413954Sgiacomo.gabrielli@arm.com * Redistribution and use in source and binary forms, with or without 1513954Sgiacomo.gabrielli@arm.com * modification, are permitted provided that the following conditions are 1613954Sgiacomo.gabrielli@arm.com * met: redistributions of source code must retain the above copyright 1713954Sgiacomo.gabrielli@arm.com * notice, this list of conditions and the following disclaimer; 1813954Sgiacomo.gabrielli@arm.com * redistributions in binary form must reproduce the above copyright 1913954Sgiacomo.gabrielli@arm.com * notice, this list of conditions and the following disclaimer in the 2013954Sgiacomo.gabrielli@arm.com * documentation and/or other materials provided with the distribution; 2113954Sgiacomo.gabrielli@arm.com * neither the name of the copyright holders nor the names of its 2213954Sgiacomo.gabrielli@arm.com * contributors may be used to endorse or promote products derived from 2313954Sgiacomo.gabrielli@arm.com * this software without specific prior written permission. 2413954Sgiacomo.gabrielli@arm.com * 2513954Sgiacomo.gabrielli@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2613954Sgiacomo.gabrielli@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2713954Sgiacomo.gabrielli@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2813954Sgiacomo.gabrielli@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2913954Sgiacomo.gabrielli@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3013954Sgiacomo.gabrielli@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3113954Sgiacomo.gabrielli@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3213954Sgiacomo.gabrielli@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3313954Sgiacomo.gabrielli@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3413954Sgiacomo.gabrielli@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3513954Sgiacomo.gabrielli@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3613954Sgiacomo.gabrielli@arm.com * 3713954Sgiacomo.gabrielli@arm.com * Authors: Andrew Bardsley 3813954Sgiacomo.gabrielli@arm.com */ 3913954Sgiacomo.gabrielli@arm.com 4013954Sgiacomo.gabrielli@arm.com#ifndef __CPU_UTILS_HH__ 4113954Sgiacomo.gabrielli@arm.com#define __CPU_UTILS_HH__ 4213954Sgiacomo.gabrielli@arm.com 4313954Sgiacomo.gabrielli@arm.com#include "base/types.hh" 4413954Sgiacomo.gabrielli@arm.com 4513954Sgiacomo.gabrielli@arm.com/** 4613954Sgiacomo.gabrielli@arm.com * Calculates the offset of a given address wrt aligned fixed-size blocks. 4713954Sgiacomo.gabrielli@arm.com * @param addr Input address. 4813954Sgiacomo.gabrielli@arm.com * @param block_size Block size in bytes. 4913954Sgiacomo.gabrielli@arm.com * @return Offset of the given address in bytes. 5013954Sgiacomo.gabrielli@arm.com */ 5113954Sgiacomo.gabrielli@arm.cominline Addr 5213954Sgiacomo.gabrielli@arm.comaddrBlockOffset(Addr addr, Addr block_size) 5313954Sgiacomo.gabrielli@arm.com{ 5413954Sgiacomo.gabrielli@arm.com return addr & (block_size - 1); 5513954Sgiacomo.gabrielli@arm.com} 5613954Sgiacomo.gabrielli@arm.com 5713954Sgiacomo.gabrielli@arm.com/** 5813954Sgiacomo.gabrielli@arm.com * Returns the address of the closest aligned fixed-size block to the given 5913954Sgiacomo.gabrielli@arm.com * address. 6013954Sgiacomo.gabrielli@arm.com * @param addr Input address. 6113954Sgiacomo.gabrielli@arm.com * @param block_size Block size in bytes. 6213954Sgiacomo.gabrielli@arm.com * @return Address of the closest aligned block. 6313954Sgiacomo.gabrielli@arm.com */ 6413954Sgiacomo.gabrielli@arm.cominline Addr 6513954Sgiacomo.gabrielli@arm.comaddrBlockAlign(Addr addr, Addr block_size) 6613954Sgiacomo.gabrielli@arm.com{ 6713954Sgiacomo.gabrielli@arm.com return addr & ~(block_size - 1); 6813954Sgiacomo.gabrielli@arm.com} 6913954Sgiacomo.gabrielli@arm.com 7013954Sgiacomo.gabrielli@arm.com/** 7113954Sgiacomo.gabrielli@arm.com * Returns true if the given memory access (address, size) needs to be 7213954Sgiacomo.gabrielli@arm.com * fragmented across aligned fixed-size blocks. 7313954Sgiacomo.gabrielli@arm.com * @param addr Address of the memory access. 7413954Sgiacomo.gabrielli@arm.com * @param size Size of the memory access. 7513954Sgiacomo.gabrielli@arm.com * @param block_size Block size in bytes. 7613954Sgiacomo.gabrielli@arm.com * @return True if the memory access needs to be fragmented. 7713954Sgiacomo.gabrielli@arm.com */ 7813954Sgiacomo.gabrielli@arm.cominline bool 7913954Sgiacomo.gabrielli@arm.comtransferNeedsBurst(Addr addr, unsigned int size, unsigned int block_size) 8013954Sgiacomo.gabrielli@arm.com{ 8113954Sgiacomo.gabrielli@arm.com return (addrBlockOffset(addr, block_size) + size) > block_size; 8213954Sgiacomo.gabrielli@arm.com} 8313954Sgiacomo.gabrielli@arm.com 8413954Sgiacomo.gabrielli@arm.com/** 8513954Sgiacomo.gabrielli@arm.com * Test if there is any active element in an enablement range. 8613954Sgiacomo.gabrielli@arm.com */ 8713954Sgiacomo.gabrielli@arm.cominline bool 8813954Sgiacomo.gabrielli@arm.comisAnyActiveElement(const std::vector<bool>::const_iterator& it_start, 8913954Sgiacomo.gabrielli@arm.com const std::vector<bool>::const_iterator& it_end) 9013954Sgiacomo.gabrielli@arm.com{ 9113954Sgiacomo.gabrielli@arm.com auto it_tmp = it_start; 9213954Sgiacomo.gabrielli@arm.com for (;it_tmp != it_end && !(*it_tmp); ++it_tmp); 9313954Sgiacomo.gabrielli@arm.com return (it_tmp != it_end); 9413954Sgiacomo.gabrielli@arm.com} 9513954Sgiacomo.gabrielli@arm.com 9613954Sgiacomo.gabrielli@arm.com#endif // __CPU_UTILS_HH__ 97