thread_state.hh revision 3276
13938Ssaidi@eecs.umich.edu/* 23938Ssaidi@eecs.umich.edu * Copyright (c) 2006 The Regents of The University of Michigan 33938Ssaidi@eecs.umich.edu * All rights reserved. 43938Ssaidi@eecs.umich.edu * 53938Ssaidi@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 63938Ssaidi@eecs.umich.edu * modification, are permitted provided that the following conditions are 73938Ssaidi@eecs.umich.edu * met: redistributions of source code must retain the above copyright 83938Ssaidi@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 93938Ssaidi@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 103938Ssaidi@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 113938Ssaidi@eecs.umich.edu * documentation and/or other materials provided with the distribution; 123938Ssaidi@eecs.umich.edu * neither the name of the copyright holders nor the names of its 133938Ssaidi@eecs.umich.edu * contributors may be used to endorse or promote products derived from 143938Ssaidi@eecs.umich.edu * this software without specific prior written permission. 153938Ssaidi@eecs.umich.edu * 163938Ssaidi@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 173938Ssaidi@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 183938Ssaidi@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 193938Ssaidi@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 203938Ssaidi@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 213938Ssaidi@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 223938Ssaidi@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 233938Ssaidi@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 243938Ssaidi@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 253938Ssaidi@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 263938Ssaidi@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 273938Ssaidi@eecs.umich.edu * 283938Ssaidi@eecs.umich.edu * Authors: Kevin Lim 293938Ssaidi@eecs.umich.edu */ 303938Ssaidi@eecs.umich.edu 313938Ssaidi@eecs.umich.edu#ifndef __CPU_THREAD_STATE_HH__ 323938Ssaidi@eecs.umich.edu#define __CPU_THREAD_STATE_HH__ 333938Ssaidi@eecs.umich.edu 343938Ssaidi@eecs.umich.edu#include "arch/types.hh" 353938Ssaidi@eecs.umich.edu#include "cpu/profile.hh" 363938Ssaidi@eecs.umich.edu#include "cpu/thread_context.hh" 373938Ssaidi@eecs.umich.edu 383938Ssaidi@eecs.umich.edu#if !FULL_SYSTEM 393938Ssaidi@eecs.umich.edu#include "mem/mem_object.hh" 403938Ssaidi@eecs.umich.edu#include "mem/translating_port.hh" 413938Ssaidi@eecs.umich.edu#include "sim/process.hh" 423938Ssaidi@eecs.umich.edu#endif 433938Ssaidi@eecs.umich.edu 443938Ssaidi@eecs.umich.edu#if FULL_SYSTEM 453938Ssaidi@eecs.umich.educlass EndQuiesceEvent; 463938Ssaidi@eecs.umich.educlass FunctionProfile; 473940Ssaidi@eecs.umich.educlass ProfileNode; 483940Ssaidi@eecs.umich.edunamespace Kernel { 493938Ssaidi@eecs.umich.edu class Statistics; 503938Ssaidi@eecs.umich.edu}; 513938Ssaidi@eecs.umich.edu#endif 523938Ssaidi@eecs.umich.edu 533938Ssaidi@eecs.umich.educlass Checkpoint; 54 55/** 56 * Struct for holding general thread state that is needed across CPU 57 * models. This includes things such as pointers to the process, 58 * memory, quiesce events, and certain stats. This can be expanded 59 * to hold more thread-specific stats within it. 60 */ 61struct ThreadState { 62 typedef ThreadContext::Status Status; 63 64#if FULL_SYSTEM 65 ThreadState(int _cpuId, int _tid); 66#else 67 ThreadState(int _cpuId, int _tid, Process *_process, 68 short _asid, MemObject *mem); 69#endif 70 71 void serialize(std::ostream &os); 72 73 void unserialize(Checkpoint *cp, const std::string §ion); 74 75 void setCpuId(int id) { cpuId = id; } 76 77 int readCpuId() { return cpuId; } 78 79 void setTid(int id) { tid = id; } 80 81 int readTid() { return tid; } 82 83 Tick readLastActivate() { return lastActivate; } 84 85 Tick readLastSuspend() { return lastSuspend; } 86 87#if FULL_SYSTEM 88 void dumpFuncProfile(); 89 90 EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; } 91 92 void profileClear(); 93 94 void profileSample(); 95 96 Kernel::Statistics *getKernelStats() { return kernelStats; } 97 98 FunctionalPort *getPhysPort() { return physPort; } 99 100 void setPhysPort(FunctionalPort *port) { physPort = port; } 101 102 VirtualPort *getVirtPort(ThreadContext *tc = NULL) { return virtPort; } 103 104 void setVirtPort(VirtualPort *port) { virtPort = port; } 105#else 106 Process *getProcessPtr() { return process; } 107 108 TranslatingPort *getMemPort() { return port; } 109 110 void setMemPort(TranslatingPort *_port) { port = _port; } 111 112 int getInstAsid() { return asid; } 113 int getDataAsid() { return asid; } 114#endif 115 116 /** Sets the current instruction being committed. */ 117 void setInst(TheISA::MachInst _inst) { inst = _inst; } 118 119 /** Returns the current instruction being committed. */ 120 TheISA::MachInst getInst() { return inst; } 121 122 /** Reads the number of instructions functionally executed and 123 * committed. 124 */ 125 Counter readFuncExeInst() { return funcExeInst; } 126 127 /** Sets the total number of instructions functionally executed 128 * and committed. 129 */ 130 void setFuncExeInst(Counter new_val) { funcExeInst = new_val; } 131 132 /** Returns the status of this thread. */ 133 Status status() const { return _status; } 134 135 /** Sets the status of this thread. */ 136 void setStatus(Status new_status) { _status = new_status; } 137 138 /** Number of instructions committed. */ 139 Counter numInst; 140 /** Stat for number instructions committed. */ 141 Stats::Scalar<> numInsts; 142 /** Stat for number of memory references. */ 143 Stats::Scalar<> numMemRefs; 144 145 /** Number of simulated loads, used for tracking events based on 146 * the number of loads committed. 147 */ 148 Counter numLoad; 149 150 /** The number of simulated loads committed prior to this run. */ 151 Counter startNumLoad; 152 153 protected: 154 ThreadContext::Status _status; 155 156 // ID of this context w.r.t. the System or Process object to which 157 // it belongs. For full-system mode, this is the system CPU ID. 158 int cpuId; 159 160 // Index of hardware thread context on the CPU that this represents. 161 int tid; 162 163 public: 164 /** Last time activate was called on this thread. */ 165 Tick lastActivate; 166 167 /** Last time suspend was called on this thread. */ 168 Tick lastSuspend; 169 170#if FULL_SYSTEM 171 public: 172 FunctionProfile *profile; 173 ProfileNode *profileNode; 174 Addr profilePC; 175 EndQuiesceEvent *quiesceEvent; 176 177 Kernel::Statistics *kernelStats; 178 protected: 179 /** A functional port outgoing only for functional accesses to physical 180 * addresses.*/ 181 FunctionalPort *physPort; 182 183 /** A functional port, outgoing only, for functional accesse to virtual 184 * addresses. That doen't require execution context information */ 185 VirtualPort *virtPort; 186#else 187 TranslatingPort *port; 188 189 Process *process; 190 191 // Address space ID. Note that this is used for TIMING cache 192 // simulation only; all functional memory accesses should use 193 // one of the FunctionalMemory pointers above. 194 short asid; 195 196#endif 197 198 /** Current instruction the thread is committing. Only set and 199 * used for DTB faults currently. 200 */ 201 TheISA::MachInst inst; 202 203 /** The current microcode pc for the currently executing macro 204 * operation. 205 */ 206 MicroPC microPC; 207 208 /** The next microcode pc for the currently executing macro 209 * operation. 210 */ 211 MicroPC nextMicroPC; 212 213 public: 214 /** 215 * Temporary storage to pass the source address from copy_load to 216 * copy_store. 217 * @todo Remove this temporary when we have a better way to do it. 218 */ 219 Addr copySrcAddr; 220 /** 221 * Temp storage for the physical source address of a copy. 222 * @todo Remove this temporary when we have a better way to do it. 223 */ 224 Addr copySrcPhysAddr; 225 226 /* 227 * number of executed instructions, for matching with syscall trace 228 * points in EIO files. 229 */ 230 Counter funcExeInst; 231 232 // 233 // Count failed store conditionals so we can warn of apparent 234 // application deadlock situations. 235 unsigned storeCondFailures; 236}; 237 238#endif // __CPU_THREAD_STATE_HH__ 239