thread_state.hh revision 2980
1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Kevin Lim 29 */ 30 31#ifndef __CPU_THREAD_STATE_HH__ 32#define __CPU_THREAD_STATE_HH__ 33 34#include "arch/types.hh" 35#include "cpu/thread_context.hh" 36 37#if !FULL_SYSTEM 38#include "mem/mem_object.hh" 39#include "mem/translating_port.hh" 40#include "sim/process.hh" 41#endif 42 43#if FULL_SYSTEM 44class EndQuiesceEvent; 45class FunctionProfile; 46class ProfileNode; 47namespace Kernel { 48 class Statistics; 49}; 50#endif 51 52class Checkpoint; 53 54/** 55 * Struct for holding general thread state that is needed across CPU 56 * models. This includes things such as pointers to the process, 57 * memory, quiesce events, and certain stats. This can be expanded 58 * to hold more thread-specific stats within it. 59 */ 60struct ThreadState { 61 typedef ThreadContext::Status Status; 62 63#if FULL_SYSTEM 64 ThreadState(int _cpuId, int _tid); 65#else 66 ThreadState(int _cpuId, int _tid, Process *_process, 67 short _asid, MemObject *mem); 68#endif 69 70 void serialize(std::ostream &os); 71 72 void unserialize(Checkpoint *cp, const std::string §ion); 73 74 void setCpuId(int id) { cpuId = id; } 75 76 int readCpuId() { return cpuId; } 77 78 void setTid(int id) { tid = id; } 79 80 int readTid() { return tid; } 81 82 Tick readLastActivate() { return lastActivate; } 83 84 Tick readLastSuspend() { return lastSuspend; } 85 86#if FULL_SYSTEM 87 void dumpFuncProfile(); 88 89 EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; } 90 91 void profileClear(); 92 93 void profileSample(); 94 95 Kernel::Statistics *getKernelStats() { return kernelStats; } 96 97 FunctionalPort *getPhysPort() { return physPort; } 98 99 void setPhysPort(FunctionalPort *port) { physPort = port; } 100 101 VirtualPort *getVirtPort(ThreadContext *tc = NULL) { return virtPort; } 102 103 void setVirtPort(VirtualPort *port) { virtPort = port; } 104#else 105 Process *getProcessPtr() { return process; } 106 107 TranslatingPort *getMemPort() { return port; } 108 109 void setMemPort(TranslatingPort *_port) { port = _port; } 110 111 int getInstAsid() { return asid; } 112 int getDataAsid() { return asid; } 113#endif 114 115 /** Sets the current instruction being committed. */ 116 void setInst(TheISA::MachInst _inst) { inst = _inst; } 117 118 /** Returns the current instruction being committed. */ 119 TheISA::MachInst getInst() { return inst; } 120 121 /** Reads the number of instructions functionally executed and 122 * committed. 123 */ 124 Counter readFuncExeInst() { return funcExeInst; } 125 126 /** Sets the total number of instructions functionally executed 127 * and committed. 128 */ 129 void setFuncExeInst(Counter new_val) { funcExeInst = new_val; } 130 131 /** Returns the status of this thread. */ 132 Status status() const { return _status; } 133 134 /** Sets the status of this thread. */ 135 void setStatus(Status new_status) { _status = new_status; } 136 137 /** Number of instructions committed. */ 138 Counter numInst; 139 /** Stat for number instructions committed. */ 140 Stats::Scalar<> numInsts; 141 /** Stat for number of memory references. */ 142 Stats::Scalar<> numMemRefs; 143 144 /** Number of simulated loads, used for tracking events based on 145 * the number of loads committed. 146 */ 147 Counter numLoad; 148 149 /** The number of simulated loads committed prior to this run. */ 150 Counter startNumLoad; 151 152 protected: 153 ThreadContext::Status _status; 154 155 // ID of this context w.r.t. the System or Process object to which 156 // it belongs. For full-system mode, this is the system CPU ID. 157 int cpuId; 158 159 // Index of hardware thread context on the CPU that this represents. 160 int tid; 161 162 public: 163 /** Last time activate was called on this thread. */ 164 Tick lastActivate; 165 166 /** Last time suspend was called on this thread. */ 167 Tick lastSuspend; 168 169#if FULL_SYSTEM 170 public: 171 FunctionProfile *profile; 172 ProfileNode *profileNode; 173 Addr profilePC; 174 EndQuiesceEvent *quiesceEvent; 175 176 Kernel::Statistics *kernelStats; 177 protected: 178 /** A functional port outgoing only for functional accesses to physical 179 * addresses.*/ 180 FunctionalPort *physPort; 181 182 /** A functional port, outgoing only, for functional accesse to virtual 183 * addresses. That doen't require execution context information */ 184 VirtualPort *virtPort; 185#else 186 TranslatingPort *port; 187 188 Process *process; 189 190 // Address space ID. Note that this is used for TIMING cache 191 // simulation only; all functional memory accesses should use 192 // one of the FunctionalMemory pointers above. 193 short asid; 194#endif 195 196 /** Current instruction the thread is committing. Only set and 197 * used for DTB faults currently. 198 */ 199 TheISA::MachInst inst; 200 201 public: 202 /** 203 * Temporary storage to pass the source address from copy_load to 204 * copy_store. 205 * @todo Remove this temporary when we have a better way to do it. 206 */ 207 Addr copySrcAddr; 208 /** 209 * Temp storage for the physical source address of a copy. 210 * @todo Remove this temporary when we have a better way to do it. 211 */ 212 Addr copySrcPhysAddr; 213 214 /* 215 * number of executed instructions, for matching with syscall trace 216 * points in EIO files. 217 */ 218 Counter funcExeInst; 219 220 // 221 // Count failed store conditionals so we can warn of apparent 222 // application deadlock situations. 223 unsigned storeCondFailures; 224}; 225 226#endif // __CPU_THREAD_STATE_HH__ 227