thread_state.hh revision 2689:dbf969c18a65
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#ifndef __CPU_THREAD_STATE_HH__
32#define __CPU_THREAD_STATE_HH__
33
34#include "arch/isa_traits.hh"
35#include "cpu/thread_context.hh"
36
37#if !FULL_SYSTEM
38#include "mem/mem_object.hh"
39#include "mem/translating_port.hh"
40#include "sim/process.hh"
41#endif
42
43#if FULL_SYSTEM
44class EndQuiesceEvent;
45class FunctionProfile;
46class ProfileNode;
47namespace Kernel {
48    class Statistics;
49};
50#endif
51
52/**
53 *  Struct for holding general thread state that is needed across CPU
54 *  models.  This includes things such as pointers to the process,
55 *  memory, quiesce events, and certain stats.  This can be expanded
56 *  to hold more thread-specific stats within it.
57 */
58struct ThreadState {
59    typedef ThreadContext::Status Status;
60
61#if FULL_SYSTEM
62    ThreadState(int _cpuId, int _tid);
63#else
64    ThreadState(int _cpuId, int _tid, MemObject *mem,
65                Process *_process, short _asid);
66#endif
67
68    void setCpuId(int id) { cpuId = id; }
69
70    int readCpuId() { return cpuId; }
71
72    void setTid(int id) { tid = id; }
73
74    int readTid() { return tid; }
75
76    Tick readLastActivate() { return lastActivate; }
77
78    Tick readLastSuspend() { return lastSuspend; }
79
80#if FULL_SYSTEM
81    void dumpFuncProfile();
82
83    EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; }
84
85    void profileClear();
86
87    void profileSample();
88
89    Kernel::Statistics *getKernelStats() { return kernelStats; }
90
91    void setPhysPort(FunctionalPort *port) { physPort = port; }
92
93    void setVirtPort(VirtualPort *port) { virtPort = port; }
94#else
95    Process *getProcessPtr() { return process; }
96
97    TranslatingPort *getMemPort() { return port; }
98
99    void setMemPort(TranslatingPort *_port) { port = _port; }
100
101    int getInstAsid() { return asid; }
102    int getDataAsid() { return asid; }
103#endif
104
105    /** Sets the current instruction being committed. */
106    void setInst(TheISA::MachInst _inst) { inst = _inst; }
107
108    /** Returns the current instruction being committed. */
109    TheISA::MachInst getInst() { return inst; }
110
111    /** Reads the number of instructions functionally executed and
112     * committed.
113     */
114    Counter readFuncExeInst() { return funcExeInst; }
115
116    /** Sets the total number of instructions functionally executed
117     * and committed.
118     */
119    void setFuncExeInst(Counter new_val) { funcExeInst = new_val; }
120
121    /** Returns the status of this thread. */
122    Status status() const { return _status; }
123
124    /** Sets the status of this thread. */
125    void setStatus(Status new_status) { _status = new_status; }
126
127    /** Number of instructions committed. */
128    Counter numInst;
129    /** Stat for number instructions committed. */
130    Stats::Scalar<> numInsts;
131    /** Stat for number of memory references. */
132    Stats::Scalar<> numMemRefs;
133
134    /** Number of simulated loads, used for tracking events based on
135     * the number of loads committed.
136     */
137    Counter numLoad;
138
139    /** The number of simulated loads committed prior to this run. */
140    Counter startNumLoad;
141
142  protected:
143    ThreadContext::Status _status;
144
145    // ID of this context w.r.t. the System or Process object to which
146    // it belongs.  For full-system mode, this is the system CPU ID.
147    int cpuId;
148
149    // Index of hardware thread context on the CPU that this represents.
150    int tid;
151
152    /** Last time activate was called on this thread. */
153    Tick lastActivate;
154
155    /** Last time suspend was called on this thread. */
156    Tick lastSuspend;
157
158#if FULL_SYSTEM
159  public:
160    FunctionProfile *profile;
161    ProfileNode *profileNode;
162    Addr profilePC;
163    EndQuiesceEvent *quiesceEvent;
164
165    Kernel::Statistics *kernelStats;
166  protected:
167    /** A functional port outgoing only for functional accesses to physical
168     * addresses.*/
169    FunctionalPort *physPort;
170
171    /** A functional port, outgoing only, for functional accesse to virtual
172     * addresses. That doen't require execution context information */
173    VirtualPort *virtPort;
174#else
175    TranslatingPort *port;
176
177    Process *process;
178
179    // Address space ID.  Note that this is used for TIMING cache
180    // simulation only; all functional memory accesses should use
181    // one of the FunctionalMemory pointers above.
182    short asid;
183#endif
184
185    /** Current instruction the thread is committing.  Only set and
186     * used for DTB faults currently.
187     */
188    TheISA::MachInst inst;
189
190    /**
191     * Temporary storage to pass the source address from copy_load to
192     * copy_store.
193     * @todo Remove this temporary when we have a better way to do it.
194     */
195    Addr copySrcAddr;
196    /**
197     * Temp storage for the physical source address of a copy.
198     * @todo Remove this temporary when we have a better way to do it.
199     */
200    Addr copySrcPhysAddr;
201
202  public:
203    /*
204     * number of executed instructions, for matching with syscall trace
205     * points in EIO files.
206     */
207    Counter funcExeInst;
208
209    //
210    // Count failed store conditionals so we can warn of apparent
211    // application deadlock situations.
212    unsigned storeCondFailures;
213};
214
215#endif // __CPU_THREAD_STATE_HH__
216