thread_state.hh revision 8706
12330SN/A/* 22330SN/A * Copyright (c) 2006 The Regents of The University of Michigan 32330SN/A * All rights reserved. 42330SN/A * 52330SN/A * Redistribution and use in source and binary forms, with or without 62330SN/A * modification, are permitted provided that the following conditions are 72330SN/A * met: redistributions of source code must retain the above copyright 82330SN/A * notice, this list of conditions and the following disclaimer; 92330SN/A * redistributions in binary form must reproduce the above copyright 102330SN/A * notice, this list of conditions and the following disclaimer in the 112330SN/A * documentation and/or other materials provided with the distribution; 122330SN/A * neither the name of the copyright holders nor the names of its 132330SN/A * contributors may be used to endorse or promote products derived from 142330SN/A * this software without specific prior written permission. 152330SN/A * 162330SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172330SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182330SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192330SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202330SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212330SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222330SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232330SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242330SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252330SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262330SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272689Sktlim@umich.edu * 282689Sktlim@umich.edu * Authors: Kevin Lim 292330SN/A */ 302292SN/A 312292SN/A#ifndef __CPU_THREAD_STATE_HH__ 322292SN/A#define __CPU_THREAD_STATE_HH__ 332292SN/A 342980Sgblack@eecs.umich.edu#include "arch/types.hh" 356658Snate@binkert.org#include "config/the_isa.hh" 368229Snate@binkert.org#include "cpu/base.hh" 372362SN/A#include "cpu/profile.hh" 382680Sktlim@umich.edu#include "cpu/thread_context.hh" 392292SN/A 402678Sktlim@umich.edu#if !FULL_SYSTEM 412683Sktlim@umich.edu#include "mem/mem_object.hh" 422683Sktlim@umich.edu#include "sim/process.hh" 432678Sktlim@umich.edu#endif 442678Sktlim@umich.edu 452292SN/A#if FULL_SYSTEM 462292SN/Aclass EndQuiesceEvent; 472292SN/Aclass FunctionProfile; 482292SN/Aclass ProfileNode; 493548Sgblack@eecs.umich.edunamespace TheISA { 503548Sgblack@eecs.umich.edu namespace Kernel { 513548Sgblack@eecs.umich.edu class Statistics; 523548Sgblack@eecs.umich.edu }; 532330SN/A}; 542292SN/A#endif 552292SN/A 562862Sktlim@umich.educlass Checkpoint; 578706Sandreas.hansson@arm.comclass PortProxy; 588706Sandreas.hansson@arm.comclass SETranslatingPort; 598706Sandreas.hansson@arm.comclass FSTranslatingPort; 602862Sktlim@umich.edu 612330SN/A/** 622330SN/A * Struct for holding general thread state that is needed across CPU 632330SN/A * models. This includes things such as pointers to the process, 642330SN/A * memory, quiesce events, and certain stats. This can be expanded 652330SN/A * to hold more thread-specific stats within it. 662330SN/A */ 672292SN/Astruct ThreadState { 682683Sktlim@umich.edu typedef ThreadContext::Status Status; 692683Sktlim@umich.edu 702292SN/A#if FULL_SYSTEM 716221Snate@binkert.org ThreadState(BaseCPU *cpu, ThreadID _tid); 722292SN/A#else 736331Sgblack@eecs.umich.edu ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process); 742292SN/A#endif 752683Sktlim@umich.edu 763486Sktlim@umich.edu ~ThreadState(); 773486Sktlim@umich.edu 782862Sktlim@umich.edu void serialize(std::ostream &os); 792862Sktlim@umich.edu 802862Sktlim@umich.edu void unserialize(Checkpoint *cp, const std::string §ion); 812862Sktlim@umich.edu 825712Shsul@eecs.umich.edu int cpuId() { return baseCpu->cpuId(); } 832683Sktlim@umich.edu 845714Shsul@eecs.umich.edu int contextId() { return _contextId; } 855714Shsul@eecs.umich.edu 865714Shsul@eecs.umich.edu void setContextId(int id) { _contextId = id; } 875714Shsul@eecs.umich.edu 886221Snate@binkert.org void setThreadId(ThreadID id) { _threadId = id; } 892683Sktlim@umich.edu 906221Snate@binkert.org ThreadID threadId() { return _threadId; } 912683Sktlim@umich.edu 922683Sktlim@umich.edu Tick readLastActivate() { return lastActivate; } 932683Sktlim@umich.edu 942683Sktlim@umich.edu Tick readLastSuspend() { return lastSuspend; } 952683Sktlim@umich.edu 962683Sktlim@umich.edu#if FULL_SYSTEM 978706Sandreas.hansson@arm.com /** 988706Sandreas.hansson@arm.com * Initialise the physical and virtual port proxies and tie them to 998706Sandreas.hansson@arm.com * the data port of the CPU. 1008706Sandreas.hansson@arm.com * 1018706Sandreas.hansson@arm.com * tc ThreadContext for the virtual-to-physical translation 1028706Sandreas.hansson@arm.com */ 1038706Sandreas.hansson@arm.com void initMemProxies(ThreadContext *tc); 1043675Sktlim@umich.edu 1052683Sktlim@umich.edu void dumpFuncProfile(); 1062683Sktlim@umich.edu 1072683Sktlim@umich.edu EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; } 1082683Sktlim@umich.edu 1092683Sktlim@umich.edu void profileClear(); 1102683Sktlim@umich.edu 1112683Sktlim@umich.edu void profileSample(); 1122683Sktlim@umich.edu 1133548Sgblack@eecs.umich.edu TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; } 1142683Sktlim@umich.edu 1158706Sandreas.hansson@arm.com PortProxy* getPhysProxy() { return physProxy; } 1162690Sktlim@umich.edu 1178706Sandreas.hansson@arm.com FSTranslatingPortProxy* getVirtProxy() { return virtProxy; } 1182683Sktlim@umich.edu#else 1192683Sktlim@umich.edu Process *getProcessPtr() { return process; } 1202683Sktlim@umich.edu 1218706Sandreas.hansson@arm.com SETranslatingPortProxy* getMemProxy(); 1222678Sktlim@umich.edu#endif 1232292SN/A 1242683Sktlim@umich.edu /** Reads the number of instructions functionally executed and 1252683Sktlim@umich.edu * committed. 1262683Sktlim@umich.edu */ 1272683Sktlim@umich.edu Counter readFuncExeInst() { return funcExeInst; } 1282683Sktlim@umich.edu 1292683Sktlim@umich.edu /** Sets the total number of instructions functionally executed 1302683Sktlim@umich.edu * and committed. 1312683Sktlim@umich.edu */ 1322683Sktlim@umich.edu void setFuncExeInst(Counter new_val) { funcExeInst = new_val; } 1332683Sktlim@umich.edu 1342683Sktlim@umich.edu /** Returns the status of this thread. */ 1352683Sktlim@umich.edu Status status() const { return _status; } 1362683Sktlim@umich.edu 1372683Sktlim@umich.edu /** Sets the status of this thread. */ 1382683Sktlim@umich.edu void setStatus(Status new_status) { _status = new_status; } 1392683Sktlim@umich.edu 1403673Srdreslin@umich.edu public: 1413486Sktlim@umich.edu 1422683Sktlim@umich.edu /** Number of instructions committed. */ 1432683Sktlim@umich.edu Counter numInst; 1442683Sktlim@umich.edu /** Stat for number instructions committed. */ 1455999Snate@binkert.org Stats::Scalar numInsts; 1462683Sktlim@umich.edu /** Stat for number of memory references. */ 1475999Snate@binkert.org Stats::Scalar numMemRefs; 1482683Sktlim@umich.edu 1492683Sktlim@umich.edu /** Number of simulated loads, used for tracking events based on 1502683Sktlim@umich.edu * the number of loads committed. 1512683Sktlim@umich.edu */ 1522683Sktlim@umich.edu Counter numLoad; 1532683Sktlim@umich.edu 1542683Sktlim@umich.edu /** The number of simulated loads committed prior to this run. */ 1552683Sktlim@umich.edu Counter startNumLoad; 1562683Sktlim@umich.edu 1572683Sktlim@umich.edu protected: 1582683Sktlim@umich.edu ThreadContext::Status _status; 1592683Sktlim@umich.edu 1603402Sktlim@umich.edu // Pointer to the base CPU. 1613402Sktlim@umich.edu BaseCPU *baseCpu; 1623402Sktlim@umich.edu 1635714Shsul@eecs.umich.edu // system wide HW context id 1645714Shsul@eecs.umich.edu int _contextId; 1655714Shsul@eecs.umich.edu 1662292SN/A // Index of hardware thread context on the CPU that this represents. 1676221Snate@binkert.org ThreadID _threadId; 1682292SN/A 1692690Sktlim@umich.edu public: 1702683Sktlim@umich.edu /** Last time activate was called on this thread. */ 1712683Sktlim@umich.edu Tick lastActivate; 1722292SN/A 1732683Sktlim@umich.edu /** Last time suspend was called on this thread. */ 1742683Sktlim@umich.edu Tick lastSuspend; 1752292SN/A 1762292SN/A#if FULL_SYSTEM 1772683Sktlim@umich.edu public: 1782292SN/A FunctionProfile *profile; 1792292SN/A ProfileNode *profileNode; 1802292SN/A Addr profilePC; 1812292SN/A EndQuiesceEvent *quiesceEvent; 1822292SN/A 1833548Sgblack@eecs.umich.edu TheISA::Kernel::Statistics *kernelStats; 1842683Sktlim@umich.edu protected: 1858706Sandreas.hansson@arm.com /** A port proxy outgoing only for functional accesses to physical 1862683Sktlim@umich.edu * addresses.*/ 1878706Sandreas.hansson@arm.com PortProxy *physProxy; 1882683Sktlim@umich.edu 1898706Sandreas.hansson@arm.com /** A translating port proxy, outgoing only, for functional 1908706Sandreas.hansson@arm.com * accesse to virtual addresses. */ 1918706Sandreas.hansson@arm.com FSTranslatingPortProxy* virtProxy; 1922292SN/A#else 1938706Sandreas.hansson@arm.com SETranslatingPortProxy* proxy; 1942678Sktlim@umich.edu 1952292SN/A Process *process; 1962330SN/A#endif 1972330SN/A 1982690Sktlim@umich.edu public: 1992292SN/A /* 2002292SN/A * number of executed instructions, for matching with syscall trace 2012292SN/A * points in EIO files. 2022292SN/A */ 2032292SN/A Counter funcExeInst; 2042292SN/A 2052292SN/A // 2062292SN/A // Count failed store conditionals so we can warn of apparent 2072292SN/A // application deadlock situations. 2082292SN/A unsigned storeCondFailures; 2092292SN/A}; 2102292SN/A 2112292SN/A#endif // __CPU_THREAD_STATE_HH__ 212