thread_state.hh revision 3675
11736SN/A/* 27778Sgblack@eecs.umich.edu * Copyright (c) 2006 The Regents of The University of Michigan 31736SN/A * All rights reserved. 41736SN/A * 51736SN/A * Redistribution and use in source and binary forms, with or without 61736SN/A * modification, are permitted provided that the following conditions are 71736SN/A * met: redistributions of source code must retain the above copyright 81736SN/A * notice, this list of conditions and the following disclaimer; 91736SN/A * redistributions in binary form must reproduce the above copyright 101736SN/A * notice, this list of conditions and the following disclaimer in the 111736SN/A * documentation and/or other materials provided with the distribution; 121736SN/A * neither the name of the copyright holders nor the names of its 131736SN/A * contributors may be used to endorse or promote products derived from 141736SN/A * this software without specific prior written permission. 151736SN/A * 161736SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 171736SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 181736SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 191736SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 201736SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 211736SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 221736SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 231736SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 241736SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 251736SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 261736SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665SN/A * 282665SN/A * Authors: Kevin Lim 297778Sgblack@eecs.umich.edu */ 301736SN/A 311519SN/A#ifndef __CPU_THREAD_STATE_HH__ 3212247Sgabeblack@google.com#define __CPU_THREAD_STATE_HH__ 3312247Sgabeblack@google.com 3412247Sgabeblack@google.com#include "arch/types.hh" 3512247Sgabeblack@google.com#include "cpu/profile.hh" 3612247Sgabeblack@google.com#include "cpu/thread_context.hh" 3712247Sgabeblack@google.com 3812247Sgabeblack@google.com#if !FULL_SYSTEM 3912247Sgabeblack@google.com#include "mem/mem_object.hh" 4012247Sgabeblack@google.com#include "sim/process.hh" 4112247Sgabeblack@google.com#endif 4212247Sgabeblack@google.com 4312247Sgabeblack@google.com#if FULL_SYSTEM 441519SN/Aclass EndQuiesceEvent; 451519SN/Aclass FunctionProfile; 461519SN/Aclass ProfileNode; 471519SN/Anamespace TheISA { 481519SN/A namespace Kernel { 491519SN/A class Statistics; 501519SN/A }; 511519SN/A}; 521519SN/A#endif 531519SN/A 5412247Sgabeblack@google.comclass BaseCPU; 5512247Sgabeblack@google.comclass Checkpoint; 5612247Sgabeblack@google.comclass Port; 5712247Sgabeblack@google.comclass TranslatingPort; 5812247Sgabeblack@google.com 5912247Sgabeblack@google.com/** 6012247Sgabeblack@google.com * Struct for holding general thread state that is needed across CPU 6112247Sgabeblack@google.com * models. This includes things such as pointers to the process, 6212247Sgabeblack@google.com * memory, quiesce events, and certain stats. This can be expanded 6312247Sgabeblack@google.com * to hold more thread-specific stats within it. 6412247Sgabeblack@google.com */ 6512247Sgabeblack@google.comstruct ThreadState { 6612247Sgabeblack@google.com typedef ThreadContext::Status Status; 6712247Sgabeblack@google.com 6812247Sgabeblack@google.com#if FULL_SYSTEM 6912247Sgabeblack@google.com ThreadState(BaseCPU *cpu, int _cpuId, int _tid); 7012247Sgabeblack@google.com#else 7112247Sgabeblack@google.com ThreadState(BaseCPU *cpu, int _cpuId, int _tid, Process *_process, 7212247Sgabeblack@google.com short _asid); 7312247Sgabeblack@google.com#endif 7412247Sgabeblack@google.com 7512247Sgabeblack@google.com ~ThreadState(); 7612247Sgabeblack@google.com 7712247Sgabeblack@google.com void serialize(std::ostream &os); 7812247Sgabeblack@google.com 7912247Sgabeblack@google.com void unserialize(Checkpoint *cp, const std::string §ion); 8012247Sgabeblack@google.com 8112247Sgabeblack@google.com void setCpuId(int id) { cpuId = id; } 8212247Sgabeblack@google.com 8312247Sgabeblack@google.com int readCpuId() { return cpuId; } 8412247Sgabeblack@google.com 8512247Sgabeblack@google.com void setTid(int id) { tid = id; } 8612247Sgabeblack@google.com 8712247Sgabeblack@google.com int readTid() { return tid; } 8812247Sgabeblack@google.com 8912247Sgabeblack@google.com Tick readLastActivate() { return lastActivate; } 9012247Sgabeblack@google.com 911519SN/A Tick readLastSuspend() { return lastSuspend; } 921606SN/A 931606SN/A#if FULL_SYSTEM 9412247Sgabeblack@google.com void init(); 9512247Sgabeblack@google.com 9612247Sgabeblack@google.com void initPhysPort(); 9712247Sgabeblack@google.com 9812247Sgabeblack@google.com void initVirtPort(); 9912247Sgabeblack@google.com 10012247Sgabeblack@google.com void dumpFuncProfile(); 10112247Sgabeblack@google.com 10212247Sgabeblack@google.com EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; } 10312247Sgabeblack@google.com 10412247Sgabeblack@google.com void profileClear(); 10512247Sgabeblack@google.com 10612247Sgabeblack@google.com void profileSample(); 10712247Sgabeblack@google.com 10812247Sgabeblack@google.com TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; } 10912247Sgabeblack@google.com 11012247Sgabeblack@google.com FunctionalPort *getPhysPort() { return physPort; } 11112247Sgabeblack@google.com 1121606SN/A void setPhysPort(FunctionalPort *port) { physPort = port; } 11312247Sgabeblack@google.com 1141606SN/A VirtualPort *getVirtPort(ThreadContext *tc = NULL) { return virtPort; } 11512247Sgabeblack@google.com 11612247Sgabeblack@google.com void setVirtPort(VirtualPort *port) { virtPort = port; } 11712247Sgabeblack@google.com#else 11812247Sgabeblack@google.com Process *getProcessPtr() { return process; } 11912247Sgabeblack@google.com 12012247Sgabeblack@google.com TranslatingPort *getMemPort(); 12112247Sgabeblack@google.com 12212247Sgabeblack@google.com void setMemPort(TranslatingPort *_port) { port = _port; } 12312247Sgabeblack@google.com 12412247Sgabeblack@google.com int getInstAsid() { return asid; } 1251944SN/A int getDataAsid() { return asid; } 1261606SN/A#endif 12712247Sgabeblack@google.com 12812247Sgabeblack@google.com /** Sets the current instruction being committed. */ 1291519SN/A void setInst(TheISA::MachInst _inst) { inst = _inst; } 1301606SN/A 1311606SN/A /** Returns the current instruction being committed. */ 13212247Sgabeblack@google.com TheISA::MachInst getInst() { return inst; } 13312247Sgabeblack@google.com 13412247Sgabeblack@google.com /** Reads the number of instructions functionally executed and 13512247Sgabeblack@google.com * committed. 13612247Sgabeblack@google.com */ 1371858SN/A Counter readFuncExeInst() { return funcExeInst; } 1381606SN/A 13912247Sgabeblack@google.com /** Sets the total number of instructions functionally executed 1401606SN/A * and committed. 1411606SN/A */ 14212247Sgabeblack@google.com void setFuncExeInst(Counter new_val) { funcExeInst = new_val; } 14312247Sgabeblack@google.com 14412247Sgabeblack@google.com /** Returns the status of this thread. */ 14512247Sgabeblack@google.com Status status() const { return _status; } 1461858SN/A 1471519SN/A /** Sets the status of this thread. */ 1481589SN/A void setStatus(Status new_status) { _status = new_status; } 14912247Sgabeblack@google.com 1501519SN/A public: 1511589SN/A /** Connects port to the functional port of the memory object 15212247Sgabeblack@google.com * below the CPU. */ 1531606SN/A void connectToMemFunc(Port *port); 1544167SN/A 1551606SN/A /** Number of instructions committed. */ 1561606SN/A Counter numInst; 15712247Sgabeblack@google.com /** Stat for number instructions committed. */ 15812247Sgabeblack@google.com Stats::Scalar<> numInsts; 1591606SN/A /** Stat for number of memory references. */ 1601606SN/A Stats::Scalar<> numMemRefs; 1611606SN/A 16212247Sgabeblack@google.com /** Number of simulated loads, used for tracking events based on 1631606SN/A * the number of loads committed. 1641606SN/A */ 1651606SN/A Counter numLoad; 1661606SN/A 1671606SN/A /** The number of simulated loads committed prior to this run. */ 1684167SN/A Counter startNumLoad; 1694167SN/A 1704167SN/A protected: 17112247Sgabeblack@google.com ThreadContext::Status _status; 1724167SN/A 1734167SN/A // Pointer to the base CPU. 1744167SN/A BaseCPU *baseCpu; 1754167SN/A 17612247Sgabeblack@google.com // ID of this context w.r.t. the System or Process object to which 17712247Sgabeblack@google.com // it belongs. For full-system mode, this is the system CPU ID. 1784167SN/A int cpuId; 1794167SN/A 1804167SN/A // Index of hardware thread context on the CPU that this represents. 1811519SN/A int tid; 1821589SN/A 18312247Sgabeblack@google.com public: 1841519SN/A /** Last time activate was called on this thread. */ 1851589SN/A Tick lastActivate; 18612247Sgabeblack@google.com 1871519SN/A /** Last time suspend was called on this thread. */ 1881589SN/A Tick lastSuspend; 18912247Sgabeblack@google.com 1907777Sgblack@eecs.umich.edu#if FULL_SYSTEM 1917777Sgblack@eecs.umich.edu public: 1927777Sgblack@eecs.umich.edu FunctionProfile *profile; 1937777Sgblack@eecs.umich.edu ProfileNode *profileNode; 1947777Sgblack@eecs.umich.edu Addr profilePC; 1957777Sgblack@eecs.umich.edu EndQuiesceEvent *quiesceEvent; 1967777Sgblack@eecs.umich.edu 1977777Sgblack@eecs.umich.edu TheISA::Kernel::Statistics *kernelStats; 1987777Sgblack@eecs.umich.edu protected: 1997777Sgblack@eecs.umich.edu /** A functional port outgoing only for functional accesses to physical 2007777Sgblack@eecs.umich.edu * addresses.*/ 2017777Sgblack@eecs.umich.edu FunctionalPort *physPort; 2027777Sgblack@eecs.umich.edu 2037777Sgblack@eecs.umich.edu /** A functional port, outgoing only, for functional accesse to virtual 2047777Sgblack@eecs.umich.edu * addresses. That doen't require execution context information */ 2057777Sgblack@eecs.umich.edu VirtualPort *virtPort; 2067777Sgblack@eecs.umich.edu#else 2077777Sgblack@eecs.umich.edu TranslatingPort *port; 2087777Sgblack@eecs.umich.edu 2097777Sgblack@eecs.umich.edu Process *process; 2107777Sgblack@eecs.umich.edu 2117777Sgblack@eecs.umich.edu // Address space ID. Note that this is used for TIMING cache 2127777Sgblack@eecs.umich.edu // simulation only; all functional memory accesses should use 2137777Sgblack@eecs.umich.edu // one of the FunctionalMemory pointers above. 2147777Sgblack@eecs.umich.edu short asid; 2157777Sgblack@eecs.umich.edu 2167777Sgblack@eecs.umich.edu#endif 2177777Sgblack@eecs.umich.edu 2187777Sgblack@eecs.umich.edu /** Current instruction the thread is committing. Only set and 2197777Sgblack@eecs.umich.edu * used for DTB faults currently. 2207777Sgblack@eecs.umich.edu */ 2217777Sgblack@eecs.umich.edu TheISA::MachInst inst; 2227777Sgblack@eecs.umich.edu 2237777Sgblack@eecs.umich.edu /** The current microcode pc for the currently executing macro 2247777Sgblack@eecs.umich.edu * operation. 2257777Sgblack@eecs.umich.edu */ 2267777Sgblack@eecs.umich.edu MicroPC microPC; 2277777Sgblack@eecs.umich.edu 2287777Sgblack@eecs.umich.edu /** The next microcode pc for the currently executing macro 2297777Sgblack@eecs.umich.edu * operation. 2307777Sgblack@eecs.umich.edu */ 2317777Sgblack@eecs.umich.edu MicroPC nextMicroPC; 2327777Sgblack@eecs.umich.edu 2337777Sgblack@eecs.umich.edu public: 2347777Sgblack@eecs.umich.edu /** 2357777Sgblack@eecs.umich.edu * Temporary storage to pass the source address from copy_load to 2367777Sgblack@eecs.umich.edu * copy_store. 2377777Sgblack@eecs.umich.edu * @todo Remove this temporary when we have a better way to do it. 2387777Sgblack@eecs.umich.edu */ 2399827Sakash.bagdia@arm.com Addr copySrcAddr; 2409827Sakash.bagdia@arm.com /** 24112247Sgabeblack@google.com * Temp storage for the physical source address of a copy. 2429827Sakash.bagdia@arm.com * @todo Remove this temporary when we have a better way to do it. 24310427Sandreas.hansson@arm.com */ 24412247Sgabeblack@google.com Addr copySrcPhysAddr; 24512251Sgabeblack@google.com 24612251Sgabeblack@google.com /* 24712251Sgabeblack@google.com * number of executed instructions, for matching with syscall trace 248 * points in EIO files. 249 */ 250 Counter funcExeInst; 251 252 // 253 // Count failed store conditionals so we can warn of apparent 254 // application deadlock situations. 255 unsigned storeCondFailures; 256}; 257 258#endif // __CPU_THREAD_STATE_HH__ 259