thread_state.hh revision 11005
12330SN/A/* 22330SN/A * Copyright (c) 2006 The Regents of The University of Michigan 32330SN/A * All rights reserved. 42330SN/A * 52330SN/A * Redistribution and use in source and binary forms, with or without 62330SN/A * modification, are permitted provided that the following conditions are 72330SN/A * met: redistributions of source code must retain the above copyright 82330SN/A * notice, this list of conditions and the following disclaimer; 92330SN/A * redistributions in binary form must reproduce the above copyright 102330SN/A * notice, this list of conditions and the following disclaimer in the 112330SN/A * documentation and/or other materials provided with the distribution; 122330SN/A * neither the name of the copyright holders nor the names of its 132330SN/A * contributors may be used to endorse or promote products derived from 142330SN/A * this software without specific prior written permission. 152330SN/A * 162330SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172330SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182330SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192330SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202330SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212330SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222330SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232330SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242330SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252330SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262330SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272689Sktlim@umich.edu * 282689Sktlim@umich.edu * Authors: Kevin Lim 292330SN/A */ 302292SN/A 312292SN/A#ifndef __CPU_THREAD_STATE_HH__ 322292SN/A#define __CPU_THREAD_STATE_HH__ 332292SN/A 342980Sgblack@eecs.umich.edu#include "arch/types.hh" 356658Snate@binkert.org#include "config/the_isa.hh" 368229Snate@binkert.org#include "cpu/base.hh" 372362SN/A#include "cpu/profile.hh" 382680Sktlim@umich.edu#include "cpu/thread_context.hh" 392683Sktlim@umich.edu#include "mem/mem_object.hh" 402683Sktlim@umich.edu#include "sim/process.hh" 412678Sktlim@umich.edu 422292SN/Aclass EndQuiesceEvent; 432292SN/Aclass FunctionProfile; 442292SN/Aclass ProfileNode; 453548Sgblack@eecs.umich.edunamespace TheISA { 463548Sgblack@eecs.umich.edu namespace Kernel { 473548Sgblack@eecs.umich.edu class Statistics; 488902Sandreas.hansson@arm.com } 498902Sandreas.hansson@arm.com} 502292SN/A 512862Sktlim@umich.educlass Checkpoint; 522862Sktlim@umich.edu 532330SN/A/** 542330SN/A * Struct for holding general thread state that is needed across CPU 552330SN/A * models. This includes things such as pointers to the process, 562330SN/A * memory, quiesce events, and certain stats. This can be expanded 572330SN/A * to hold more thread-specific stats within it. 582330SN/A */ 5910905Sandreas.sandberg@arm.comstruct ThreadState : public Serializable { 602683Sktlim@umich.edu typedef ThreadContext::Status Status; 612683Sktlim@umich.edu 626331Sgblack@eecs.umich.edu ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process); 632683Sktlim@umich.edu 648735Sandreas.hanson@arm.com virtual ~ThreadState(); 653486Sktlim@umich.edu 6610905Sandreas.sandberg@arm.com void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; 672862Sktlim@umich.edu 6810905Sandreas.sandberg@arm.com void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; 692862Sktlim@umich.edu 7010110Sandreas.hansson@arm.com int cpuId() const { return baseCpu->cpuId(); } 712683Sktlim@umich.edu 7210190Sakash.bagdia@arm.com uint32_t socketId() const { return baseCpu->socketId(); } 7310190Sakash.bagdia@arm.com 7411005Sandreas.sandberg@arm.com ContextID contextId() const { return _contextId; } 755714Shsul@eecs.umich.edu 7611005Sandreas.sandberg@arm.com void setContextId(ContextID id) { _contextId = id; } 775714Shsul@eecs.umich.edu 786221Snate@binkert.org void setThreadId(ThreadID id) { _threadId = id; } 792683Sktlim@umich.edu 8010110Sandreas.hansson@arm.com ThreadID threadId() const { return _threadId; } 812683Sktlim@umich.edu 8210110Sandreas.hansson@arm.com Tick readLastActivate() const { return lastActivate; } 832683Sktlim@umich.edu 8410110Sandreas.hansson@arm.com Tick readLastSuspend() const { return lastSuspend; } 852683Sktlim@umich.edu 868706Sandreas.hansson@arm.com /** 878706Sandreas.hansson@arm.com * Initialise the physical and virtual port proxies and tie them to 888706Sandreas.hansson@arm.com * the data port of the CPU. 898706Sandreas.hansson@arm.com * 908921Sandreas.hansson@arm.com * @param tc ThreadContext for the virtual-to-physical translation 918706Sandreas.hansson@arm.com */ 928706Sandreas.hansson@arm.com void initMemProxies(ThreadContext *tc); 933675Sktlim@umich.edu 942683Sktlim@umich.edu void dumpFuncProfile(); 952683Sktlim@umich.edu 962683Sktlim@umich.edu EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; } 972683Sktlim@umich.edu 982683Sktlim@umich.edu void profileClear(); 992683Sktlim@umich.edu 1002683Sktlim@umich.edu void profileSample(); 1012683Sktlim@umich.edu 1023548Sgblack@eecs.umich.edu TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; } 1032683Sktlim@umich.edu 1049101SBrad.Beckmann@amd.com PortProxy &getPhysProxy(); 1052690Sktlim@umich.edu 1069101SBrad.Beckmann@amd.com FSTranslatingPortProxy &getVirtProxy(); 1078799Sgblack@eecs.umich.edu 1082683Sktlim@umich.edu Process *getProcessPtr() { return process; } 1092683Sktlim@umich.edu 1109101SBrad.Beckmann@amd.com SETranslatingPortProxy &getMemProxy(); 1112292SN/A 1122683Sktlim@umich.edu /** Reads the number of instructions functionally executed and 1132683Sktlim@umich.edu * committed. 1142683Sktlim@umich.edu */ 1152683Sktlim@umich.edu Counter readFuncExeInst() { return funcExeInst; } 1162683Sktlim@umich.edu 1172683Sktlim@umich.edu /** Sets the total number of instructions functionally executed 1182683Sktlim@umich.edu * and committed. 1192683Sktlim@umich.edu */ 1202683Sktlim@umich.edu void setFuncExeInst(Counter new_val) { funcExeInst = new_val; } 1212683Sktlim@umich.edu 1222683Sktlim@umich.edu /** Returns the status of this thread. */ 1232683Sktlim@umich.edu Status status() const { return _status; } 1242683Sktlim@umich.edu 1252683Sktlim@umich.edu /** Sets the status of this thread. */ 1262683Sktlim@umich.edu void setStatus(Status new_status) { _status = new_status; } 1272683Sktlim@umich.edu 1283673Srdreslin@umich.edu public: 1293486Sktlim@umich.edu 1302683Sktlim@umich.edu /** Number of instructions committed. */ 1312683Sktlim@umich.edu Counter numInst; 1322683Sktlim@umich.edu /** Stat for number instructions committed. */ 1335999Snate@binkert.org Stats::Scalar numInsts; 1348834Satgutier@umich.edu /** Number of ops (including micro ops) committed. */ 1358834Satgutier@umich.edu Counter numOp; 1368834Satgutier@umich.edu /** Stat for number ops (including micro ops) committed. */ 1378834Satgutier@umich.edu Stats::Scalar numOps; 1382683Sktlim@umich.edu /** Stat for number of memory references. */ 1395999Snate@binkert.org Stats::Scalar numMemRefs; 1402683Sktlim@umich.edu 1412683Sktlim@umich.edu /** Number of simulated loads, used for tracking events based on 1422683Sktlim@umich.edu * the number of loads committed. 1432683Sktlim@umich.edu */ 1442683Sktlim@umich.edu Counter numLoad; 1452683Sktlim@umich.edu 1462683Sktlim@umich.edu /** The number of simulated loads committed prior to this run. */ 1472683Sktlim@umich.edu Counter startNumLoad; 1482683Sktlim@umich.edu 1492683Sktlim@umich.edu protected: 1502683Sktlim@umich.edu ThreadContext::Status _status; 1512683Sktlim@umich.edu 1523402Sktlim@umich.edu // Pointer to the base CPU. 1533402Sktlim@umich.edu BaseCPU *baseCpu; 1543402Sktlim@umich.edu 1555714Shsul@eecs.umich.edu // system wide HW context id 15611005Sandreas.sandberg@arm.com ContextID _contextId; 1575714Shsul@eecs.umich.edu 1582292SN/A // Index of hardware thread context on the CPU that this represents. 1596221Snate@binkert.org ThreadID _threadId; 1602292SN/A 1612690Sktlim@umich.edu public: 1622683Sktlim@umich.edu /** Last time activate was called on this thread. */ 1632683Sktlim@umich.edu Tick lastActivate; 1642292SN/A 1652683Sktlim@umich.edu /** Last time suspend was called on this thread. */ 1662683Sktlim@umich.edu Tick lastSuspend; 1672292SN/A 1682683Sktlim@umich.edu public: 1692292SN/A FunctionProfile *profile; 1702292SN/A ProfileNode *profileNode; 1712292SN/A Addr profilePC; 1722292SN/A EndQuiesceEvent *quiesceEvent; 1732292SN/A 1743548Sgblack@eecs.umich.edu TheISA::Kernel::Statistics *kernelStats; 1758777Sgblack@eecs.umich.edu 1762683Sktlim@umich.edu protected: 1778229Snate@binkert.org Process *process; 1788229Snate@binkert.org 1798706Sandreas.hansson@arm.com /** A port proxy outgoing only for functional accesses to physical 1802683Sktlim@umich.edu * addresses.*/ 1818706Sandreas.hansson@arm.com PortProxy *physProxy; 1822683Sktlim@umich.edu 1838706Sandreas.hansson@arm.com /** A translating port proxy, outgoing only, for functional 1848706Sandreas.hansson@arm.com * accesse to virtual addresses. */ 1858852Sandreas.hansson@arm.com FSTranslatingPortProxy *virtProxy; 1868852Sandreas.hansson@arm.com SETranslatingPortProxy *proxy; 1872678Sktlim@umich.edu 1882690Sktlim@umich.edu public: 1892292SN/A /* 1902292SN/A * number of executed instructions, for matching with syscall trace 1912292SN/A * points in EIO files. 1922292SN/A */ 1932292SN/A Counter funcExeInst; 1942292SN/A 1952292SN/A // 1962292SN/A // Count failed store conditionals so we can warn of apparent 1972292SN/A // application deadlock situations. 1982292SN/A unsigned storeCondFailures; 1992292SN/A}; 2002292SN/A 2012292SN/A#endif // __CPU_THREAD_STATE_HH__ 202