thread_state.cc revision 8777:dd43f1c9fa0a 
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#include "base/output.hh"
32#include "cpu/base.hh"
33#include "cpu/profile.hh"
34#include "cpu/thread_state.hh"
35#include "mem/port.hh"
36#include "mem/translating_port.hh"
37#include "mem/vport.hh"
38#include "sim/serialize.hh"
39
40#if FULL_SYSTEM
41#include "arch/kernel_stats.hh"
42#include "cpu/quiesce_event.hh"
43#endif
44
45ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process)
46    : numInst(0), numLoad(0), _status(ThreadContext::Halted),
47      baseCpu(cpu), _threadId(_tid), lastActivate(0), lastSuspend(0),
48#if FULL_SYSTEM
49      profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
50      kernelStats(NULL),
51#endif
52      process(_process), port(NULL), virtPort(NULL), physPort(NULL),
53      funcExeInst(0), storeCondFailures(0)
54{
55}
56
57ThreadState::~ThreadState()
58{
59    if (port) {
60        delete port->getPeer();
61        delete port;
62    }
63}
64
65void
66ThreadState::serialize(std::ostream &os)
67{
68    SERIALIZE_ENUM(_status);
69    // thread_num and cpu_id are deterministic from the config
70    SERIALIZE_SCALAR(funcExeInst);
71
72#if FULL_SYSTEM
73    Tick quiesceEndTick = 0;
74    if (quiesceEvent->scheduled())
75        quiesceEndTick = quiesceEvent->when();
76    SERIALIZE_SCALAR(quiesceEndTick);
77    if (kernelStats)
78        kernelStats->serialize(os);
79#endif
80}
81
82void
83ThreadState::unserialize(Checkpoint *cp, const std::string &section)
84{
85
86    UNSERIALIZE_ENUM(_status);
87    // thread_num and cpu_id are deterministic from the config
88    UNSERIALIZE_SCALAR(funcExeInst);
89
90#if FULL_SYSTEM
91    Tick quiesceEndTick;
92    UNSERIALIZE_SCALAR(quiesceEndTick);
93    if (quiesceEndTick)
94        baseCpu->schedule(quiesceEvent, quiesceEndTick);
95    if (kernelStats)
96        kernelStats->unserialize(cp, section);
97#endif
98}
99
100void
101ThreadState::connectPhysPort()
102{
103    // @todo: For now this disregards any older port that may have
104    // already existed.  Fix this memory leak once the bus port IDs
105    // for functional ports is resolved.
106    if (physPort)
107        physPort->removeConn();
108    else
109        physPort = new FunctionalPort(csprintf("%s-%d-funcport",
110                                           baseCpu->name(), _threadId));
111    connectToMemFunc(physPort);
112}
113
114void
115ThreadState::connectVirtPort(ThreadContext *tc)
116{
117    // @todo: For now this disregards any older port that may have
118    // already existed.  Fix this memory leak once the bus port IDs
119    // for functional ports is resolved.
120    if (virtPort)
121        virtPort->removeConn();
122    else
123        virtPort = new VirtualPort(csprintf("%s-%d-vport",
124                                        baseCpu->name(), _threadId), tc);
125    connectToMemFunc(virtPort);
126}
127
128void
129ThreadState::connectMemPorts(ThreadContext *tc)
130{
131    connectPhysPort();
132    connectVirtPort(tc);
133}
134
135void
136ThreadState::profileClear()
137{
138    if (profile)
139        profile->clear();
140}
141
142void
143ThreadState::profileSample()
144{
145    if (profile)
146        profile->sample(profileNode, profilePC);
147}
148
149TranslatingPort *
150ThreadState::getMemPort()
151{
152    if (port != NULL)
153        return port;
154
155    /* Use this port to for syscall emulation writes to memory. */
156    port = new TranslatingPort(csprintf("%s-%d-funcport", baseCpu->name(),
157                               _threadId), process, TranslatingPort::NextPage);
158
159    connectToMemFunc(port);
160
161    return port;
162}
163
164void
165ThreadState::connectToMemFunc(Port *port)
166{
167    Port *dcache_port, *func_mem_port;
168
169    dcache_port = baseCpu->getPort("dcache_port");
170    assert(dcache_port != NULL);
171
172    MemObject *mem_object = dcache_port->getPeer()->getOwner();
173    assert(mem_object != NULL);
174
175    func_mem_port = mem_object->getPort("functional");
176    assert(func_mem_port != NULL);
177
178    func_mem_port->setPeer(port);
179    port->setPeer(func_mem_port);
180}
181