thread_state.cc revision 6324
1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Kevin Lim 29 */ 30 31#include "base/output.hh" 32#include "cpu/base.hh" 33#include "cpu/profile.hh" 34#include "cpu/thread_state.hh" 35#include "mem/port.hh" 36#include "mem/translating_port.hh" 37#include "sim/serialize.hh" 38 39#if FULL_SYSTEM 40#include "arch/kernel_stats.hh" 41#include "cpu/quiesce_event.hh" 42#include "mem/vport.hh" 43#endif 44 45#if FULL_SYSTEM 46ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid) 47#else 48ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, 49 Process *_process, short _asid) 50#endif 51 : numInst(0), numLoad(0), _status(ThreadContext::Halted), 52 baseCpu(cpu), _threadId(_tid), lastActivate(0), lastSuspend(0), 53#if FULL_SYSTEM 54 profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL), 55 kernelStats(NULL), physPort(NULL), virtPort(NULL), 56#else 57 port(NULL), process(_process), asid(_asid), 58#endif 59 funcExeInst(0), storeCondFailures(0) 60{ 61} 62 63ThreadState::~ThreadState() 64{ 65#if !FULL_SYSTEM 66 if (port) { 67 delete port->getPeer(); 68 delete port; 69 } 70#endif 71} 72 73void 74ThreadState::serialize(std::ostream &os) 75{ 76 SERIALIZE_ENUM(_status); 77 // thread_num and cpu_id are deterministic from the config 78 SERIALIZE_SCALAR(funcExeInst); 79 SERIALIZE_SCALAR(inst); 80 81#if FULL_SYSTEM 82 Tick quiesceEndTick = 0; 83 if (quiesceEvent->scheduled()) 84 quiesceEndTick = quiesceEvent->when(); 85 SERIALIZE_SCALAR(quiesceEndTick); 86 if (kernelStats) 87 kernelStats->serialize(os); 88#endif 89} 90 91void 92ThreadState::unserialize(Checkpoint *cp, const std::string §ion) 93{ 94 95 UNSERIALIZE_ENUM(_status); 96 // thread_num and cpu_id are deterministic from the config 97 UNSERIALIZE_SCALAR(funcExeInst); 98 UNSERIALIZE_SCALAR(inst); 99 100#if FULL_SYSTEM 101 Tick quiesceEndTick; 102 UNSERIALIZE_SCALAR(quiesceEndTick); 103 if (quiesceEndTick) 104 baseCpu->schedule(quiesceEvent, quiesceEndTick); 105 if (kernelStats) 106 kernelStats->unserialize(cp, section); 107#endif 108} 109 110#if FULL_SYSTEM 111void 112ThreadState::connectMemPorts(ThreadContext *tc) 113{ 114 connectPhysPort(); 115 connectVirtPort(tc); 116} 117 118void 119ThreadState::connectPhysPort() 120{ 121 // @todo: For now this disregards any older port that may have 122 // already existed. Fix this memory leak once the bus port IDs 123 // for functional ports is resolved. 124 if (physPort) 125 physPort->removeConn(); 126 else 127 physPort = new FunctionalPort(csprintf("%s-%d-funcport", 128 baseCpu->name(), _threadId)); 129 connectToMemFunc(physPort); 130} 131 132void 133ThreadState::connectVirtPort(ThreadContext *tc) 134{ 135 // @todo: For now this disregards any older port that may have 136 // already existed. Fix this memory leak once the bus port IDs 137 // for functional ports is resolved. 138 if (virtPort) 139 virtPort->removeConn(); 140 else 141 virtPort = new VirtualPort(csprintf("%s-%d-vport", 142 baseCpu->name(), _threadId), tc); 143 connectToMemFunc(virtPort); 144} 145 146void 147ThreadState::profileClear() 148{ 149 if (profile) 150 profile->clear(); 151} 152 153void 154ThreadState::profileSample() 155{ 156 if (profile) 157 profile->sample(profileNode, profilePC); 158} 159 160#else 161TranslatingPort * 162ThreadState::getMemPort() 163{ 164 if (port != NULL) 165 return port; 166 167 /* Use this port to for syscall emulation writes to memory. */ 168 port = new TranslatingPort(csprintf("%s-%d-funcport", baseCpu->name(), _threadId), 169 process, TranslatingPort::NextPage); 170 171 connectToMemFunc(port); 172 173 return port; 174} 175#endif 176 177void 178ThreadState::connectToMemFunc(Port *port) 179{ 180 Port *dcache_port, *func_mem_port; 181 182 dcache_port = baseCpu->getPort("dcache_port"); 183 assert(dcache_port != NULL); 184 185 MemObject *mem_object = dcache_port->getPeer()->getOwner(); 186 assert(mem_object != NULL); 187 188 func_mem_port = mem_object->getPort("functional"); 189 assert(func_mem_port != NULL); 190 191 func_mem_port->setPeer(port); 192 port->setPeer(func_mem_port); 193} 194