thread_context.cc revision 6658:f4de76601762 
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#include "base/misc.hh"
32#include "base/trace.hh"
33#include "config/the_isa.hh"
34#include "cpu/thread_context.hh"
35
36void
37ThreadContext::compare(ThreadContext *one, ThreadContext *two)
38{
39    DPRINTF(Context, "Comparing thread contexts\n");
40
41    // First loop through the integer registers.
42    for (int i = 0; i < TheISA::NumIntRegs; ++i) {
43        TheISA::IntReg t1 = one->readIntReg(i);
44        TheISA::IntReg t2 = two->readIntReg(i);
45        if (t1 != t2)
46            panic("Int reg idx %d doesn't match, one: %#x, two: %#x",
47                  i, t1, t2);
48    }
49
50    // Then loop through the floating point registers.
51    for (int i = 0; i < TheISA::NumFloatRegs; ++i) {
52        TheISA::FloatRegBits t1 = one->readFloatRegBits(i);
53        TheISA::FloatRegBits t2 = two->readFloatRegBits(i);
54        if (t1 != t2)
55            panic("Float reg idx %d doesn't match, one: %#x, two: %#x",
56                  i, t1, t2);
57    }
58#if FULL_SYSTEM
59    for (int i = 0; i < TheISA::NumMiscRegs; ++i) {
60        TheISA::MiscReg t1 = one->readMiscRegNoEffect(i);
61        TheISA::MiscReg t2 = two->readMiscRegNoEffect(i);
62        if (t1 != t2)
63            panic("Misc reg idx %d doesn't match, one: %#x, two: %#x",
64                  i, t1, t2);
65    }
66#endif
67
68    Addr pc1 = one->readPC();
69    Addr pc2 = two->readPC();
70    if (pc1 != pc2)
71        panic("PCs doesn't match, one: %#x, two: %#x", pc1, pc2);
72
73    Addr npc1 = one->readNextPC();
74    Addr npc2 = two->readNextPC();
75    if (npc1 != npc2)
76        panic("NPCs doesn't match, one: %#x, two: %#x", npc1, npc2);
77
78    int id1 = one->cpuId();
79    int id2 = two->cpuId();
80    if (id1 != id2)
81        panic("CPU ids don't match, one: %d, two: %d", id1, id2);
82
83    id1 = one->contextId();
84    id2 = two->contextId();
85    if (id1 != id2)
86        panic("Context ids don't match, one: %d, two: %d", id1, id2);
87
88
89}
90