traffic_gen.hh revision 9717:dd2e46b239c1 
1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Thomas Grass
38 *          Andreas Hansson
39 *          Sascha Bischoff
40 */
41#ifndef __CPU_TRAFFIC_GEN_TRAFFIC_GEN_HH__
42#define __CPU_TRAFFIC_GEN_TRAFFIC_GEN_HH__
43
44#include "base/hashmap.hh"
45#include "cpu/testers/traffic_gen/generators.hh"
46#include "mem/mem_object.hh"
47#include "mem/qport.hh"
48#include "params/TrafficGen.hh"
49
50/**
51 * The traffic generator is a master module that generates stimuli for
52 * the memory system, based on a collection of simple generator
53 * behaviours that are either probabilistic or based on traces. It can
54 * be used stand alone for creating test cases for interconnect and
55 * memory controllers, or function as a black box replacement for
56 * system components that are not yet modelled in detail, e.g. a video
57 * engine or baseband subsystem.
58 */
59class TrafficGen : public MemObject
60{
61
62  private:
63
64    /**
65     * Determine next state and perform the transition.
66     */
67    void transition();
68
69    /**
70     * Enter a new state.
71     *
72     * @param newState identifier of state to enter
73     */
74    void enterState(uint32_t newState);
75
76    /**
77     * Get the tick of the next event, either an execution or a
78     * transition.
79     *
80     * @return tick of the next update event
81     */
82    Tick nextEventTick()
83    {
84        return std::min(states[currState]->nextExecuteTick(),
85                        nextTransitionTick);
86    }
87
88    /**
89     * Parse the config file and build the state map and
90     * transition matrix.
91     *
92     * @param file_name Config file name to parse
93     * @param master_id MasterID to use for generated requests
94     */
95    void parseConfig(const std::string& file_name, MasterID master_id);
96
97    /**
98     * Schedules event for next update and executes an update on the
99     * state graph, either performing a state transition or executing
100     * the current state, depending on the current time.
101     */
102    void update();
103
104    /** Struct to represent a probabilistic transition during parsing. */
105    struct Transition {
106        uint32_t from;
107        uint32_t to;
108        double p;
109    };
110
111    /**
112     * The system used to determine which mode we are currently operating
113     * in.
114     */
115    System* system;
116
117    /**
118     * MasterID used in generated requests.
119     */
120    MasterID masterID;
121
122    /** Time of next transition */
123    Tick nextTransitionTick;
124
125    /** State transition matrix */
126    std::vector<std::vector<double> > transitionMatrix;
127
128    /** Index of the current state */
129    uint32_t currState;
130
131    /** Map of generator states */
132    m5::hash_map<uint32_t, BaseGen*> states;
133
134    /** Queued master port */
135    class TrafficGenPort : public QueuedMasterPort
136    {
137      public:
138
139        TrafficGenPort(const std::string& name, TrafficGen& _owner)
140            : QueuedMasterPort(name, &_owner, queue), queue(_owner, *this)
141        { }
142
143      protected:
144
145        bool recvTimingResp(PacketPtr pkt);
146
147      private:
148
149        MasterPacketQueue queue;
150
151    };
152
153    /** The instance of master port used by the traffic generator. */
154    TrafficGenPort port;
155
156    /** Event for scheduling updates */
157    EventWrapper<TrafficGen, &TrafficGen::update> updateEvent;
158
159
160  public:
161
162    TrafficGen(const TrafficGenParams* p);
163
164    ~TrafficGen() {}
165
166    virtual BaseMasterPort& getMasterPort(const std::string &if_name,
167                                          PortID idx = InvalidPortID);
168
169    void init();
170
171    void initState();
172
173    unsigned int drain(DrainManager *dm);
174
175    void serialize(std::ostream &os);
176
177    void unserialize(Checkpoint* cp, const std::string& section);
178
179};
180
181#endif //__CPU_TRAFFIC_GEN_TRAFFIC_GEN_HH__
182