traffic_gen.hh revision 12396:3d04ea44fafb
1/*
2 * Copyright (c) 2012-2013, 2016-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Thomas Grass
38 *          Andreas Hansson
39 *          Sascha Bischoff
40 */
41
42#ifndef __CPU_TRAFFIC_GEN_TRAFFIC_GEN_HH__
43#define __CPU_TRAFFIC_GEN_TRAFFIC_GEN_HH__
44
45#include <unordered_map>
46
47#include "base/statistics.hh"
48#include "cpu/testers/traffic_gen/base_gen.hh"
49#include "cpu/testers/traffic_gen/dram_gen.hh"
50#include "cpu/testers/traffic_gen/dram_rot_gen.hh"
51#include "cpu/testers/traffic_gen/idle_gen.hh"
52#include "cpu/testers/traffic_gen/linear_gen.hh"
53#include "cpu/testers/traffic_gen/random_gen.hh"
54#include "cpu/testers/traffic_gen/trace_gen.hh"
55#include "mem/mem_object.hh"
56#include "mem/qport.hh"
57#include "params/TrafficGen.hh"
58
59/**
60 * The traffic generator is a master module that generates stimuli for
61 * the memory system, based on a collection of simple generator
62 * behaviours that are either probabilistic or based on traces. It can
63 * be used stand alone for creating test cases for interconnect and
64 * memory controllers, or function as a black box replacement for
65 * system components that are not yet modelled in detail, e.g. a video
66 * engine or baseband subsystem.
67 */
68class TrafficGen : public MemObject
69{
70
71  private:
72
73    /**
74     * Determine next state and perform the transition.
75     */
76    void transition();
77
78    /**
79     * Enter a new state.
80     *
81     * @param newState identifier of state to enter
82     */
83    void enterState(uint32_t newState);
84
85    /**
86     * Resolve a file path in the configuration file.
87     *
88     * This method resolves a relative path to a file that has been
89     * referenced in the configuration file. It first tries to resolve
90     * the file relative to the configuration file's path. If that
91     * fails, it falls back to constructing a path relative to the
92     * current working directory.
93     *
94     * Absolute paths are returned unmodified.
95     *
96     * @param name Path to resolve
97     */
98    std::string resolveFile(const std::string &name);
99
100    /**
101     * Parse the config file and build the state map and
102     * transition matrix.
103     */
104    void parseConfig();
105
106    /**
107     * Schedules event for next update and executes an update on the
108     * state graph, either performing a state transition or executing
109     * the current state, depending on the current time.
110     */
111    void update();
112
113    /**
114     * Receive a retry from the neighbouring port and attempt to
115     * resend the waiting packet.
116     */
117    void recvReqRetry();
118
119    /**
120     * Method to inform the user we have made no progress.
121     */
122    void noProgress();
123
124    /** Struct to represent a probabilistic transition during parsing. */
125    struct Transition {
126        uint32_t from;
127        uint32_t to;
128        double p;
129    };
130
131    /**
132     * The system used to determine which mode we are currently operating
133     * in.
134     */
135    System* system;
136
137    /**
138     * MasterID used in generated requests.
139     */
140    MasterID masterID;
141
142    /**
143     * The config file to parse.
144     */
145    const std::string configFile;
146
147    /**
148     * Determine whether to add elasticity in the request injection,
149     * thus responding to backpressure by slowing things down.
150     */
151    const bool elasticReq;
152
153    /**
154     * Time to tolerate waiting for retries (not making progress),
155     * until we declare things broken.
156     */
157    const Tick progressCheck;
158
159    /**
160     * Event to keep track of our progress, or lack thereof.
161     */
162    EventFunctionWrapper noProgressEvent;
163
164    /** Time of next transition */
165    Tick nextTransitionTick;
166
167    /** Time of the next packet. */
168    Tick nextPacketTick;
169
170    /** State transition matrix */
171    std::vector<std::vector<double> > transitionMatrix;
172
173    /** Index of the current state */
174    uint32_t currState;
175
176    /** Map of generator states */
177    std::unordered_map<uint32_t, BaseGen*> states;
178
179    /** Master port specialisation for the traffic generator */
180    class TrafficGenPort : public MasterPort
181    {
182      public:
183
184        TrafficGenPort(const std::string& name, TrafficGen& traffic_gen)
185            : MasterPort(name, &traffic_gen), trafficGen(traffic_gen)
186        { }
187
188      protected:
189
190        void recvReqRetry() { trafficGen.recvReqRetry(); }
191
192        bool recvTimingResp(PacketPtr pkt);
193
194        void recvTimingSnoopReq(PacketPtr pkt) { }
195
196        void recvFunctionalSnoop(PacketPtr pkt) { }
197
198        Tick recvAtomicSnoop(PacketPtr pkt) { return 0; }
199
200      private:
201
202        TrafficGen& trafficGen;
203
204    };
205
206    /** The instance of master port used by the traffic generator. */
207    TrafficGenPort port;
208
209    /** Packet waiting to be sent. */
210    PacketPtr retryPkt;
211
212    /** Tick when the stalled packet was meant to be sent. */
213    Tick retryPktTick;
214
215    /** Event for scheduling updates */
216    EventFunctionWrapper updateEvent;
217
218    uint64_t numSuppressed;
219
220    /** Count the number of generated packets. */
221    Stats::Scalar numPackets;
222
223    /** Count the number of retries. */
224    Stats::Scalar numRetries;
225
226    /** Count the time incurred from back-pressure. */
227    Stats::Scalar retryTicks;
228
229  public:
230
231    TrafficGen(const TrafficGenParams* p);
232
233    ~TrafficGen() {}
234
235    BaseMasterPort& getMasterPort(const std::string &if_name,
236                                  PortID idx = InvalidPortID) override;
237
238    void init() override;
239
240    void initState() override;
241
242    DrainState drain() override;
243
244    void serialize(CheckpointOut &cp) const override;
245    void unserialize(CheckpointIn &cp) override;
246
247    /** Register statistics */
248    void regStats() override;
249
250};
251
252#endif //__CPU_TRAFFIC_GEN_TRAFFIC_GEN_HH__
253