base_gen.hh revision 12804:f47e75dce5c6 
1/*
2 * Copyright (c) 2012-2013, 2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed here under.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Thomas Grass
38 *          Andreas Hansson
39 *          Sascha Bischoff
40 *          Neha Agarwal
41 */
42
43/**
44 * @file
45 * Declaration of the base generator class for all generators.
46 */
47
48#ifndef __CPU_TRAFFIC_GEN_BASE_GEN_HH__
49#define __CPU_TRAFFIC_GEN_BASE_GEN_HH__
50
51#include "base/bitfield.hh"
52#include "base/intmath.hh"
53#include "mem/packet.hh"
54
55/**
56 * Base class for all generators, with the shared functionality and
57 * virtual functions for entering, executing and leaving the
58 * generator.
59 */
60class BaseGen
61{
62
63  protected:
64
65    /** Name to use for status and debug printing */
66    const std::string _name;
67
68    /** The MasterID used for generating requests */
69    const MasterID masterID;
70
71    /**
72     * Generate a new request and associated packet
73     *
74     * @param addr Physical address to use
75     * @param size Size of the request
76     * @param cmd Memory command to send
77     * @param flags Optional request flags
78     */
79    PacketPtr getPacket(Addr addr, unsigned size, const MemCmd& cmd,
80                        Request::FlagsType flags = 0);
81
82  public:
83
84    /** Time to spend in this state */
85    const Tick duration;
86
87    /**
88     * Create a base generator.
89     *
90     * @param _name Name to use for status and debug
91     * @param master_id MasterID set on each request
92     * @param _duration duration of this state before transitioning
93     */
94    BaseGen(const std::string& _name, MasterID master_id, Tick _duration);
95
96    virtual ~BaseGen() { }
97
98    /**
99     * Get the name, useful for DPRINTFs.
100     *
101     * @return the given name
102     */
103    std::string name() const { return _name; }
104
105    /**
106     * Enter this generator state.
107     */
108    virtual void enter() = 0;
109
110    /**
111     * Get the next generated packet.
112     *
113     * @return A packet to be sent at the current tick
114     */
115    virtual PacketPtr getNextPacket() = 0;
116
117    /**
118     * Exit this generator state. By default do nothing.
119     */
120    virtual void exit() { };
121
122    /**
123     * Determine the tick when the next packet is available. MaxTick
124     * means that there will not be any further packets in the current
125     * activation cycle of the generator.
126     *
127     * @param elastic should the injection respond to flow control or not
128     * @param delay time the previous packet spent waiting
129     * @return next tick when a packet is available
130     */
131    virtual Tick nextPacketTick(bool elastic, Tick delay) const = 0;
132
133};
134
135#endif
136