RubyTester.cc revision 8965 
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
15 * Copyright (c) 2009 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 */
41
42#include "base/misc.hh"
43#include "cpu/testers/rubytest/Check.hh"
44#include "cpu/testers/rubytest/RubyTester.hh"
45#include "debug/RubyTest.hh"
46#include "mem/ruby/common/Global.hh"
47#include "mem/ruby/common/SubBlock.hh"
48#include "mem/ruby/eventqueue/RubyEventQueue.hh"
49#include "mem/ruby/system/System.hh"
50#include "sim/sim_exit.hh"
51#include "sim/system.hh"
52
53RubyTester::RubyTester(const Params *p)
54  : MemObject(p), checkStartEvent(this),
55    _masterId(p->system->getMasterId(name())),
56    m_num_cpus(p->num_cpus),
57    m_checks_to_complete(p->checks_to_complete),
58    m_deadlock_threshold(p->deadlock_threshold),
59    m_wakeup_frequency(p->wakeup_frequency),
60    m_check_flush(p->check_flush),
61    m_num_inst_ports(p->port_cpuInstPort_connection_count)
62{
63    m_checks_completed = 0;
64
65    //
66    // Create the requested inst and data ports and place them on the
67    // appropriate read and write port lists.  The reason for the subtle
68    // difference between inst and data ports vs. read and write ports is
69    // from the tester's perspective, it only needs to know whether a port
70    // supports reads (checks) or writes (actions).  Meanwhile, the protocol
71    // controllers have data ports (support read and writes) or inst ports
72    // (support only reads).
73    // Note: the inst ports are the lowest elements of the readPort vector,
74    // then the data ports are added to the readPort vector
75    //
76    for (int i = 0; i < p->port_cpuInstPort_connection_count; ++i) {
77        readPorts.push_back(new CpuPort(csprintf("%s-instPort%d", name(), i),
78                                        this, i));
79    }
80    for (int i = 0; i < p->port_cpuDataPort_connection_count; ++i) {
81        CpuPort *port = new CpuPort(csprintf("%s-dataPort%d", name(), i),
82                                    this, i);
83        readPorts.push_back(port);
84        writePorts.push_back(port);
85    }
86
87    // add the check start event to the event queue
88    schedule(checkStartEvent, 1);
89}
90
91RubyTester::~RubyTester()
92{
93    delete m_checkTable_ptr;
94    // Only delete the readPorts since the writePorts are just a subset
95    for (int i = 0; i < readPorts.size(); i++)
96        delete readPorts[i];
97}
98
99void
100RubyTester::init()
101{
102    assert(writePorts.size() > 0 && readPorts.size() > 0);
103
104    m_last_progress_vector.resize(m_num_cpus);
105    for (int i = 0; i < m_last_progress_vector.size(); i++) {
106        m_last_progress_vector[i] = 0;
107    }
108
109    m_num_writers = writePorts.size();
110    m_num_readers = readPorts.size();
111
112    m_checkTable_ptr = new CheckTable(m_num_writers, m_num_readers, this);
113}
114
115MasterPort &
116RubyTester::getMasterPort(const std::string &if_name, int idx)
117{
118    if (if_name != "cpuInstPort" && if_name != "cpuDataPort") {
119        // pass it along to our super class
120        return MemObject::getMasterPort(if_name, idx);
121    } else {
122        if (if_name == "cpuInstPort") {
123            if (idx > m_num_inst_ports) {
124                panic("RubyTester::getMasterPort: unknown inst port idx %d\n",
125                      idx);
126            }
127            //
128            // inst ports directly map to the lowest readPort elements
129            //
130            return *readPorts[idx];
131        } else {
132            assert(if_name == "cpuDataPort");
133            //
134            // add the inst port offset to translate to the correct read port
135            // index
136            //
137            int read_idx = idx + m_num_inst_ports;
138            if (read_idx >= static_cast<int>(readPorts.size())) {
139                panic("RubyTester::getMasterPort: unknown data port idx %d\n",
140                      idx);
141            }
142            return *readPorts[read_idx];
143        }
144    }
145}
146
147bool
148RubyTester::CpuPort::recvTiming(PacketPtr pkt)
149{
150    // retrieve the subblock and call hitCallback
151    RubyTester::SenderState* senderState =
152        safe_cast<RubyTester::SenderState*>(pkt->senderState);
153    SubBlock* subblock = senderState->subBlock;
154    assert(subblock != NULL);
155
156    // pop the sender state from the packet
157    pkt->senderState = senderState->saved;
158
159    tester->hitCallback(id, subblock);
160
161    // Now that the tester has completed, delete the senderState
162    // (includes sublock) and the packet, then return
163    delete senderState;
164    delete pkt->req;
165    delete pkt;
166    return true;
167}
168
169bool
170RubyTester::isInstReadableCpuPort(int idx)
171{
172    return idx < m_num_inst_ports;
173}
174
175MasterPort*
176RubyTester::getReadableCpuPort(int idx)
177{
178    assert(idx >= 0 && idx < readPorts.size());
179
180    return readPorts[idx];
181}
182
183MasterPort*
184RubyTester::getWritableCpuPort(int idx)
185{
186    assert(idx >= 0 && idx < writePorts.size());
187
188    return writePorts[idx];
189}
190
191void
192RubyTester::hitCallback(NodeID proc, SubBlock* data)
193{
194    // Mark that we made progress
195    m_last_progress_vector[proc] = g_eventQueue_ptr->getTime();
196
197    DPRINTF(RubyTest, "completed request for proc: %d\n", proc);
198    DPRINTF(RubyTest, "addr: 0x%x, size: %d, data: ",
199            data->getAddress(), data->getSize());
200    for (int byte = 0; byte < data->getSize(); byte++) {
201        DPRINTF(RubyTest, "%d", data->getByte(byte));
202    }
203    DPRINTF(RubyTest, "\n");
204
205    // This tells us our store has 'completed' or for a load gives us
206    // back the data to make the check
207    Check* check_ptr = m_checkTable_ptr->getCheck(data->getAddress());
208    assert(check_ptr != NULL);
209    check_ptr->performCallback(proc, data);
210}
211
212void
213RubyTester::wakeup()
214{
215    if (m_checks_completed < m_checks_to_complete) {
216        // Try to perform an action or check
217        Check* check_ptr = m_checkTable_ptr->getRandomCheck();
218        assert(check_ptr != NULL);
219        check_ptr->initiate();
220
221        checkForDeadlock();
222
223        schedule(checkStartEvent, curTick() + m_wakeup_frequency);
224    } else {
225        exitSimLoop("Ruby Tester completed");
226    }
227}
228
229void
230RubyTester::checkForDeadlock()
231{
232    int size = m_last_progress_vector.size();
233    Time current_time = g_eventQueue_ptr->getTime();
234    for (int processor = 0; processor < size; processor++) {
235        if ((current_time - m_last_progress_vector[processor]) >
236                m_deadlock_threshold) {
237            panic("Deadlock detected: current_time: %d last_progress_time: %d "
238                  "difference:  %d processor: %d\n",
239                  current_time, m_last_progress_vector[processor],
240                  current_time - m_last_progress_vector[processor], processor);
241        }
242    }
243}
244
245void
246RubyTester::print(std::ostream& out) const
247{
248    out << "[RubyTester]" << std::endl;
249}
250
251RubyTester *
252RubyTesterParams::create()
253{
254    return new RubyTester(this);
255}
256