CheckTable.cc revision 7055
12810SN/A/* 29347SAndreas.Sandberg@arm.com * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 39347SAndreas.Sandberg@arm.com * Copyright (c) 2009 Advanced Micro Devices, Inc. 49347SAndreas.Sandberg@arm.com * All rights reserved. 59347SAndreas.Sandberg@arm.com * 69347SAndreas.Sandberg@arm.com * Redistribution and use in source and binary forms, with or without 79347SAndreas.Sandberg@arm.com * modification, are permitted provided that the following conditions are 89347SAndreas.Sandberg@arm.com * met: redistributions of source code must retain the above copyright 99347SAndreas.Sandberg@arm.com * notice, this list of conditions and the following disclaimer; 109347SAndreas.Sandberg@arm.com * redistributions in binary form must reproduce the above copyright 119347SAndreas.Sandberg@arm.com * notice, this list of conditions and the following disclaimer in the 129347SAndreas.Sandberg@arm.com * documentation and/or other materials provided with the distribution; 139347SAndreas.Sandberg@arm.com * neither the name of the copyright holders nor the names of its 142810SN/A * contributors may be used to endorse or promote products derived from 152810SN/A * this software without specific prior written permission. 162810SN/A * 172810SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182810SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192810SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202810SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212810SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222810SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232810SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242810SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252810SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262810SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272810SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282810SN/A */ 292810SN/A 302810SN/A#include "cpu/rubytest/Check.hh" 312810SN/A#include "cpu/rubytest/CheckTable.hh" 322810SN/A#include "cpu/rubytest/CheckTable.hh" 332810SN/A#include "mem/gems_common/Map.hh" 342810SN/A 352810SN/ACheckTable::CheckTable(int _num_cpu_sequencers, RubyTester* _tester) 362810SN/A : m_num_cpu_sequencers(_num_cpu_sequencers), m_tester_ptr(_tester) 372810SN/A{ 382810SN/A m_lookup_map_ptr = new Map<Address, Check*>; 392810SN/A physical_address_t physical = 0; 402810SN/A Address address; 419347SAndreas.Sandberg@arm.com 422810SN/A const int size1 = 32; 432810SN/A const int size2 = 100; 442810SN/A 452810SN/A // The first set is to get some false sharing 462810SN/A physical = 1000; 472810SN/A for (int i = 0; i < size1; i++) { 484626SN/A // Setup linear addresses 494626SN/A address.setAddress(physical); 502810SN/A addCheck(address); 512810SN/A physical += CHECK_SIZE; 524626SN/A } 538229Snate@binkert.org 544626SN/A // The next two sets are to get some limited false sharing and 559347SAndreas.Sandberg@arm.com // cache conflicts 562810SN/A physical = 1000; 572810SN/A for (int i = 0; i < size2; i++) { 583374SN/A // Setup linear addresses 592810SN/A address.setAddress(physical); 609347SAndreas.Sandberg@arm.com addCheck(address); 614626SN/A physical += 256; 622810SN/A } 635314SN/A 645314SN/A physical = 1000 + CHECK_SIZE; 655314SN/A for (int i = 0; i < size2; i++) { 662810SN/A // Setup linear addresses 674626SN/A address.setAddress(physical); 684626SN/A addCheck(address); 692810SN/A physical += 256; 704626SN/A } 714666SN/A} 724626SN/A 732810SN/ACheckTable::~CheckTable() 742810SN/A{ 752810SN/A int size = m_check_vector.size(); 762810SN/A for (int i = 0; i < size; i++) 774626SN/A delete m_check_vector[i]; 784626SN/A delete m_lookup_map_ptr; 794626SN/A} 802810SN/A 814626SN/Avoid 822810SN/ACheckTable::addCheck(const Address& address) 832810SN/A{ 844626SN/A if (log_int(CHECK_SIZE) != 0) { 854626SN/A if (address.bitSelect(0, CHECK_SIZE_BITS - 1) != 0) { 862810SN/A ERROR_MSG("Check not aligned"); 872810SN/A } 882810SN/A } 899347SAndreas.Sandberg@arm.com 909347SAndreas.Sandberg@arm.com for (int i = 0; i < CHECK_SIZE; i++) { 919347SAndreas.Sandberg@arm.com if (m_lookup_map_ptr->exist(Address(address.getAddress()+i))) { 924666SN/A // A mapping for this byte already existed, discard the 934666SN/A // entire check 944666SN/A return; 952810SN/A } 964626SN/A } 972810SN/A 984626SN/A Check* check_ptr = new Check(address, Address(100 + m_check_vector.size()), 994626SN/A m_num_cpu_sequencers, m_tester_ptr); 1004628SN/A for (int i = 0; i < CHECK_SIZE; i++) { 1014628SN/A // Insert it once per byte 1024628SN/A m_lookup_map_ptr->add(Address(address.getAddress() + i), check_ptr); 1032810SN/A } 1042810SN/A m_check_vector.insertAtBottom(check_ptr); 1054626SN/A} 1064626SN/A 1074626SN/ACheck* 1084626SN/ACheckTable::getRandomCheck() 1092810SN/A{ 1105314SN/A return m_check_vector[random() % m_check_vector.size()]; 1115314SN/A} 1122810SN/A 1132810SN/ACheck* 1142810SN/ACheckTable::getCheck(const Address& address) 1152810SN/A{ 1162810SN/A DEBUG_MSG(TESTER_COMP, MedPrio, "Looking for check by address"); 1174626SN/A DEBUG_EXPR(TESTER_COMP, MedPrio, address); 1182810SN/A 1192810SN/A if (m_lookup_map_ptr->exist(address)) { 1202810SN/A Check* check = m_lookup_map_ptr->lookup(address); 1214626SN/A assert(check != NULL); 1222810SN/A return check; 1232810SN/A } else { 1244626SN/A return NULL; 1252810SN/A } 1264626SN/A} 1272810SN/A 1282810SN/Avoid 1292810SN/ACheckTable::print(std::ostream& out) const 1302991SN/A{ 1312810SN/A} 1322810SN/A