Check.cc revision 7823
16899SN/A/* 26899SN/A * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 36899SN/A * Copyright (c) 2009 Advanced Micro Devices, Inc. 46899SN/A * All rights reserved. 56899SN/A * 66899SN/A * Redistribution and use in source and binary forms, with or without 76899SN/A * modification, are permitted provided that the following conditions are 86899SN/A * met: redistributions of source code must retain the above copyright 96899SN/A * notice, this list of conditions and the following disclaimer; 106899SN/A * redistributions in binary form must reproduce the above copyright 116899SN/A * notice, this list of conditions and the following disclaimer in the 126899SN/A * documentation and/or other materials provided with the distribution; 136899SN/A * neither the name of the copyright holders nor the names of its 146899SN/A * contributors may be used to endorse or promote products derived from 156899SN/A * this software without specific prior written permission. 166899SN/A * 176899SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 186899SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 196899SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 206899SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 216899SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 226899SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 236899SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 246899SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 256899SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 266899SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 276899SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 286899SN/A */ 296899SN/A 307632SBrad.Beckmann@amd.com#include "cpu/testers/rubytest/Check.hh" 317053SN/A#include "mem/ruby/common/SubBlock.hh" 326899SN/A#include "mem/ruby/system/Sequencer.hh" 336899SN/A#include "mem/ruby/system/System.hh" 346899SN/A 357053SN/Atypedef RubyTester::SenderState SenderState; 367053SN/A 377053SN/ACheck::Check(const Address& address, const Address& pc, 387053SN/A int _num_cpu_sequencers, RubyTester* _tester) 397053SN/A : m_num_cpu_sequencers(_num_cpu_sequencers), m_tester_ptr(_tester) 406899SN/A{ 417053SN/A m_status = TesterStatus_Idle; 426899SN/A 437053SN/A pickValue(); 447053SN/A pickInitiatingNode(); 457053SN/A changeAddress(address); 467053SN/A m_pc = pc; 477053SN/A m_access_mode = AccessModeType(random() % AccessModeType_NUM); 487053SN/A m_store_count = 0; 496899SN/A} 506899SN/A 517053SN/Avoid 527053SN/ACheck::initiate() 536899SN/A{ 547053SN/A DPRINTF(RubyTest, "initiating\n"); 557053SN/A debugPrint(); 566899SN/A 577053SN/A // currently no protocols support prefetches 587053SN/A if (false && (random() & 0xf) == 0) { 597053SN/A initiatePrefetch(); // Prefetch from random processor 607053SN/A } 616899SN/A 627053SN/A if (m_status == TesterStatus_Idle) { 637053SN/A initiateAction(); 647053SN/A } else if (m_status == TesterStatus_Ready) { 657053SN/A initiateCheck(); 667053SN/A } else { 677053SN/A // Pending - do nothing 687053SN/A DPRINTF(RubyTest, 697053SN/A "initiating action/check - failed: action/check is pending\n"); 707053SN/A } 716899SN/A} 726899SN/A 737053SN/Avoid 747053SN/ACheck::initiatePrefetch() 756899SN/A{ 767053SN/A DPRINTF(RubyTest, "initiating prefetch\n"); 776899SN/A 787053SN/A int index = random() % m_num_cpu_sequencers; 797053SN/A RubyTester::CpuPort* port = 807053SN/A safe_cast<RubyTester::CpuPort*>(m_tester_ptr->getCpuPort(index)); 816899SN/A 827053SN/A Request::Flags flags; 837053SN/A flags.set(Request::PREFETCH); 846899SN/A 857053SN/A Packet::Command cmd; 866899SN/A 877053SN/A // 1 in 8 chance this will be an exclusive prefetch 887053SN/A if ((random() & 0x7) != 0) { 897053SN/A cmd = MemCmd::ReadReq; 907053SN/A 917053SN/A // 50% chance that the request will be an instruction fetch 927053SN/A if ((random() & 0x1) == 0) { 937053SN/A flags.set(Request::INST_FETCH); 947053SN/A } 957053SN/A } else { 967053SN/A cmd = MemCmd::WriteReq; 977053SN/A flags.set(Request::PF_EXCLUSIVE); 986899SN/A } 996899SN/A 1007568SN/A // Prefetches are assumed to be 0 sized 1017823Ssteve.reinhardt@amd.com Request *req = new Request(m_address.getAddress(), 0, flags, curTick(), 1027568SN/A m_pc.getAddress()); 1037568SN/A 1047053SN/A PacketPtr pkt = new Packet(req, cmd, port->idx); 1056899SN/A 1067053SN/A // push the subblock onto the sender state. The sequencer will 1077053SN/A // update the subblock on the return 1087053SN/A pkt->senderState = 1097053SN/A new SenderState(m_address, req->getSize(), pkt->senderState); 1106899SN/A 1117053SN/A if (port->sendTiming(pkt)) { 1127053SN/A DPRINTF(RubyTest, "successfully initiated prefetch.\n"); 1137053SN/A } else { 1147053SN/A // If the packet did not issue, must delete 1157053SN/A SenderState* senderState = safe_cast<SenderState*>(pkt->senderState); 1167053SN/A pkt->senderState = senderState->saved; 1177053SN/A delete senderState; 1187053SN/A delete pkt->req; 1197053SN/A delete pkt; 1206899SN/A 1217053SN/A DPRINTF(RubyTest, 1227053SN/A "prefetch initiation failed because Port was busy.\n"); 1237053SN/A } 1246899SN/A} 1256899SN/A 1267053SN/Avoid 1277053SN/ACheck::initiateAction() 1286899SN/A{ 1297053SN/A DPRINTF(RubyTest, "initiating Action\n"); 1307053SN/A assert(m_status == TesterStatus_Idle); 1316899SN/A 1327053SN/A int index = random() % m_num_cpu_sequencers; 1337053SN/A RubyTester::CpuPort* port = 1347053SN/A safe_cast<RubyTester::CpuPort*>(m_tester_ptr->getCpuPort(index)); 1356899SN/A 1367053SN/A Request::Flags flags; 1376899SN/A 1387053SN/A // Create the particular address for the next byte to be written 1397053SN/A Address writeAddr(m_address.getAddress() + m_store_count); 1406899SN/A 1417053SN/A // Stores are assumed to be 1 byte-sized 1427823Ssteve.reinhardt@amd.com Request *req = new Request(writeAddr.getAddress(), 1, flags, curTick(), 1437053SN/A m_pc.getAddress()); 1446899SN/A 1457053SN/A Packet::Command cmd; 1467053SN/A 1477053SN/A // 1 out of 8 chance, issue an atomic rather than a write 1487053SN/A // if ((random() & 0x7) == 0) { 1497053SN/A // cmd = MemCmd::SwapReq; 1507053SN/A // } else { 1516899SN/A cmd = MemCmd::WriteReq; 1527053SN/A // } 1536899SN/A 1547053SN/A PacketPtr pkt = new Packet(req, cmd, port->idx); 1557053SN/A uint8_t* writeData = new uint8_t; 1567053SN/A *writeData = m_value + m_store_count; 1577053SN/A pkt->dataDynamic(writeData); 1586899SN/A 1597053SN/A DPRINTF(RubyTest, "data 0x%x check 0x%x\n", 1607053SN/A *(pkt->getPtr<uint8_t>()), *writeData); 1616899SN/A 1627053SN/A // push the subblock onto the sender state. The sequencer will 1637053SN/A // update the subblock on the return 1647053SN/A pkt->senderState = 1657053SN/A new SenderState(writeAddr, req->getSize(), pkt->senderState); 1666899SN/A 1677053SN/A if (port->sendTiming(pkt)) { 1687053SN/A DPRINTF(RubyTest, "initiating action - successful\n"); 1697053SN/A DPRINTF(RubyTest, "status before action update: %s\n", 1707053SN/A (TesterStatus_to_string(m_status)).c_str()); 1717053SN/A m_status = TesterStatus_Action_Pending; 1727053SN/A } else { 1737053SN/A // If the packet did not issue, must delete 1747053SN/A // Note: No need to delete the data, the packet destructor 1757053SN/A // will delete it 1767053SN/A SenderState* senderState = safe_cast<SenderState*>(pkt->senderState); 1777053SN/A pkt->senderState = senderState->saved; 1787053SN/A delete senderState; 1797053SN/A delete pkt->req; 1807053SN/A delete pkt; 1817053SN/A 1827053SN/A DPRINTF(RubyTest, "failed to initiate action - sequencer not ready\n"); 1837053SN/A } 1847053SN/A 1857053SN/A DPRINTF(RubyTest, "status after action update: %s\n", 1866899SN/A (TesterStatus_to_string(m_status)).c_str()); 1876899SN/A} 1886899SN/A 1897053SN/Avoid 1907053SN/ACheck::initiateCheck() 1916899SN/A{ 1927053SN/A DPRINTF(RubyTest, "Initiating Check\n"); 1937053SN/A assert(m_status == TesterStatus_Ready); 1946899SN/A 1957053SN/A int index = random() % m_num_cpu_sequencers; 1967053SN/A RubyTester::CpuPort* port = 1977053SN/A safe_cast<RubyTester::CpuPort*>(m_tester_ptr->getCpuPort(index)); 1986899SN/A 1997053SN/A Request::Flags flags; 2006899SN/A 2017053SN/A // 50% chance that the request will be an instruction fetch 2027053SN/A if ((random() & 0x1) == 0) { 2037053SN/A flags.set(Request::INST_FETCH); 2047053SN/A } 2056899SN/A 2067568SN/A // Checks are sized depending on the number of bytes written 2077568SN/A Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags, 2087823Ssteve.reinhardt@amd.com curTick(), m_pc.getAddress()); 2097568SN/A 2107053SN/A PacketPtr pkt = new Packet(req, MemCmd::ReadReq, port->idx); 2117053SN/A uint8_t* dataArray = new uint8_t[CHECK_SIZE]; 2127053SN/A pkt->dataDynamicArray(dataArray); 2136899SN/A 2147053SN/A // push the subblock onto the sender state. The sequencer will 2157053SN/A // update the subblock on the return 2167053SN/A pkt->senderState = 2177053SN/A new SenderState(m_address, req->getSize(), pkt->senderState); 2186899SN/A 2197053SN/A if (port->sendTiming(pkt)) { 2207053SN/A DPRINTF(RubyTest, "initiating check - successful\n"); 2217053SN/A DPRINTF(RubyTest, "status before check update: %s\n", 2227053SN/A TesterStatus_to_string(m_status).c_str()); 2237053SN/A m_status = TesterStatus_Check_Pending; 2247053SN/A } else { 2257053SN/A // If the packet did not issue, must delete 2267053SN/A // Note: No need to delete the data, the packet destructor 2277053SN/A // will delete it 2287053SN/A SenderState* senderState = safe_cast<SenderState*>(pkt->senderState); 2297053SN/A pkt->senderState = senderState->saved; 2307053SN/A delete senderState; 2317053SN/A delete pkt->req; 2327053SN/A delete pkt; 2336899SN/A 2347053SN/A DPRINTF(RubyTest, "failed to initiate check - cpu port not ready\n"); 2357053SN/A } 2367053SN/A 2377053SN/A DPRINTF(RubyTest, "status after check update: %s\n", 2387053SN/A TesterStatus_to_string(m_status).c_str()); 2396899SN/A} 2406899SN/A 2417053SN/Avoid 2427053SN/ACheck::performCallback(NodeID proc, SubBlock* data) 2436899SN/A{ 2447053SN/A Address address = data->getAddress(); 2456899SN/A 2467053SN/A // This isn't exactly right since we now have multi-byte checks 2477053SN/A // assert(getAddress() == address); 2486899SN/A 2497053SN/A assert(getAddress().getLineAddress() == address.getLineAddress()); 2507053SN/A assert(data != NULL); 2517053SN/A 2527053SN/A DPRINTF(RubyTest, "RubyTester Callback\n"); 2536899SN/A debugPrint(); 2546899SN/A 2557053SN/A if (m_status == TesterStatus_Action_Pending) { 2567053SN/A DPRINTF(RubyTest, "Action callback write value: %d, currently %d\n", 2577053SN/A (m_value + m_store_count), data->getByte(0)); 2587053SN/A // Perform store one byte at a time 2597053SN/A data->setByte(0, (m_value + m_store_count)); 2607053SN/A m_store_count++; 2617053SN/A if (m_store_count == CHECK_SIZE) { 2627053SN/A m_status = TesterStatus_Ready; 2637053SN/A } else { 2647053SN/A m_status = TesterStatus_Idle; 2657053SN/A } 2667053SN/A DPRINTF(RubyTest, "Action callback return data now %d\n", 2677053SN/A data->getByte(0)); 2687053SN/A } else if (m_status == TesterStatus_Check_Pending) { 2697053SN/A DPRINTF(RubyTest, "Check callback\n"); 2707053SN/A // Perform load/check 2717053SN/A for (int byte_number=0; byte_number<CHECK_SIZE; byte_number++) { 2727053SN/A if (uint8(m_value + byte_number) != data->getByte(byte_number)) { 2737805Snilay@cs.wisc.edu panic("Action/check failure: proc: %d address: %s data: %s " 2747805Snilay@cs.wisc.edu "byte_number: %d m_value+byte_number: %d byte: %d %s" 2757805Snilay@cs.wisc.edu "Time: %d\n", 2767805Snilay@cs.wisc.edu proc, address, data, byte_number, 2777805Snilay@cs.wisc.edu (int)m_value + byte_number, 2787805Snilay@cs.wisc.edu (int)data->getByte(byte_number), *this, 2797805Snilay@cs.wisc.edu g_eventQueue_ptr->getTime()); 2807053SN/A } 2817053SN/A } 2827053SN/A DPRINTF(RubyTest, "Action/check success\n"); 2837053SN/A debugPrint(); 2846899SN/A 2857053SN/A // successful check complete, increment complete 2867053SN/A m_tester_ptr->incrementCheckCompletions(); 2876899SN/A 2887053SN/A m_status = TesterStatus_Idle; 2897053SN/A pickValue(); 2907053SN/A 2917053SN/A } else { 2927805Snilay@cs.wisc.edu panic("Unexpected TesterStatus: %s proc: %d data: %s m_status: %s " 2937805Snilay@cs.wisc.edu "time: %d\n", 2947805Snilay@cs.wisc.edu *this, proc, data, m_status, g_eventQueue_ptr->getTime()); 2957053SN/A } 2967053SN/A 2977053SN/A DPRINTF(RubyTest, "proc: %d, Address: 0x%x\n", proc, 2987053SN/A getAddress().getLineAddress()); 2997053SN/A DPRINTF(RubyTest, "Callback done\n"); 3007053SN/A debugPrint(); 3016899SN/A} 3026899SN/A 3037053SN/Avoid 3047053SN/ACheck::changeAddress(const Address& address) 3056899SN/A{ 3067053SN/A assert(m_status == TesterStatus_Idle || m_status == TesterStatus_Ready); 3077053SN/A m_status = TesterStatus_Idle; 3087053SN/A m_address = address; 3097053SN/A m_store_count = 0; 3106899SN/A} 3116899SN/A 3127053SN/Avoid 3137053SN/ACheck::pickValue() 3146899SN/A{ 3157053SN/A assert(m_status == TesterStatus_Idle); 3167053SN/A m_status = TesterStatus_Idle; 3177053SN/A m_value = random() & 0xff; // One byte 3187053SN/A m_store_count = 0; 3196899SN/A} 3206899SN/A 3217053SN/Avoid 3227053SN/ACheck::pickInitiatingNode() 3236899SN/A{ 3247053SN/A assert(m_status == TesterStatus_Idle || m_status == TesterStatus_Ready); 3257053SN/A m_status = TesterStatus_Idle; 3267053SN/A m_initiatingNode = (random() % m_num_cpu_sequencers); 3277053SN/A DPRINTF(RubyTest, "picked initiating node %d\n", m_initiatingNode); 3287053SN/A m_store_count = 0; 3296899SN/A} 3306899SN/A 3317053SN/Avoid 3327055SN/ACheck::print(std::ostream& out) const 3336899SN/A{ 3347053SN/A out << "[" 3357053SN/A << m_address << ", value: " 3367053SN/A << (int)m_value << ", status: " 3377053SN/A << m_status << ", initiating node: " 3387053SN/A << m_initiatingNode << ", store_count: " 3397053SN/A << m_store_count 3407055SN/A << "]" << std::flush; 3416899SN/A} 3426899SN/A 3437053SN/Avoid 3447053SN/ACheck::debugPrint() 3456899SN/A{ 3467053SN/A DPRINTF(RubyTest, 3477053SN/A "[%#x, value: %d, status: %s, initiating node: %d, store_count: %d]\n", 3487053SN/A m_address.getAddress(), (int)m_value, 3497053SN/A TesterStatus_to_string(m_status).c_str(), 3507053SN/A m_initiatingNode, m_store_count); 3516899SN/A} 352