static_inst.cc revision 5870
16019Shines@cs.fsu.edu/* 26019Shines@cs.fsu.edu * Copyright (c) 2003-2005 The Regents of The University of Michigan 36019Shines@cs.fsu.edu * All rights reserved. 46019Shines@cs.fsu.edu * 56019Shines@cs.fsu.edu * Redistribution and use in source and binary forms, with or without 66019Shines@cs.fsu.edu * modification, are permitted provided that the following conditions are 76019Shines@cs.fsu.edu * met: redistributions of source code must retain the above copyright 86019Shines@cs.fsu.edu * notice, this list of conditions and the following disclaimer; 96019Shines@cs.fsu.edu * redistributions in binary form must reproduce the above copyright 106019Shines@cs.fsu.edu * notice, this list of conditions and the following disclaimer in the 116019Shines@cs.fsu.edu * documentation and/or other materials provided with the distribution; 126019Shines@cs.fsu.edu * neither the name of the copyright holders nor the names of its 136019Shines@cs.fsu.edu * contributors may be used to endorse or promote products derived from 146019Shines@cs.fsu.edu * this software without specific prior written permission. 156019Shines@cs.fsu.edu * 166019Shines@cs.fsu.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176019Shines@cs.fsu.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186019Shines@cs.fsu.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196019Shines@cs.fsu.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206019Shines@cs.fsu.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216019Shines@cs.fsu.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226019Shines@cs.fsu.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236019Shines@cs.fsu.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246019Shines@cs.fsu.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256019Shines@cs.fsu.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266019Shines@cs.fsu.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276019Shines@cs.fsu.edu * 286019Shines@cs.fsu.edu * Authors: Steve Reinhardt 296019Shines@cs.fsu.edu * Nathan Binkert 306019Shines@cs.fsu.edu */ 316019Shines@cs.fsu.edu 326019Shines@cs.fsu.edu#include <iostream> 336019Shines@cs.fsu.edu#include "cpu/static_inst.hh" 346019Shines@cs.fsu.edu#include "sim/core.hh" 356019Shines@cs.fsu.edu 366019Shines@cs.fsu.eduStaticInstPtr StaticInst::nullStaticInstPtr; 376019Shines@cs.fsu.edu 386019Shines@cs.fsu.edu// Define the decode cache hash map. 396019Shines@cs.fsu.eduStaticInst::DecodeCache StaticInst::decodeCache; 406019Shines@cs.fsu.eduStaticInst::AddrDecodeCache StaticInst::addrDecodeCache; 416019Shines@cs.fsu.eduStaticInst::cacheElement StaticInst::recentDecodes[2]; 426019Shines@cs.fsu.edu 436019Shines@cs.fsu.eduusing namespace std; 446019Shines@cs.fsu.edu 456019Shines@cs.fsu.eduStaticInst::~StaticInst() 466019Shines@cs.fsu.edu{ 476019Shines@cs.fsu.edu if (cachedDisassembly) 486019Shines@cs.fsu.edu delete cachedDisassembly; 496019Shines@cs.fsu.edu} 506019Shines@cs.fsu.edu 516019Shines@cs.fsu.eduvoid 526019Shines@cs.fsu.eduStaticInst::dumpDecodeCacheStats() 536019Shines@cs.fsu.edu{ 546019Shines@cs.fsu.edu cerr << "Decode hash table stats @ " << curTick << ":" << endl; 556019Shines@cs.fsu.edu cerr << "\tnum entries = " << decodeCache.size() << endl; 566019Shines@cs.fsu.edu cerr << "\tnum buckets = " << decodeCache.bucket_count() << endl; 576019Shines@cs.fsu.edu vector<int> hist(100, 0); 586019Shines@cs.fsu.edu int max_hist = 0; 596019Shines@cs.fsu.edu for (int i = 0; i < decodeCache.bucket_count(); ++i) { 606019Shines@cs.fsu.edu int count = decodeCache.elems_in_bucket(i); 616019Shines@cs.fsu.edu if (count > max_hist) 626019Shines@cs.fsu.edu max_hist = count; 636019Shines@cs.fsu.edu hist[count]++; 646019Shines@cs.fsu.edu } 656019Shines@cs.fsu.edu for (int i = 0; i <= max_hist; ++i) { 666019Shines@cs.fsu.edu cerr << "\tbuckets of size " << i << " = " << hist[i] << endl; 676019Shines@cs.fsu.edu } 686019Shines@cs.fsu.edu} 696019Shines@cs.fsu.edu 706019Shines@cs.fsu.edubool 716019Shines@cs.fsu.eduStaticInst::hasBranchTarget(Addr pc, ThreadContext *tc, Addr &tgt) const 726019Shines@cs.fsu.edu{ 736019Shines@cs.fsu.edu if (isDirectCtrl()) { 746019Shines@cs.fsu.edu tgt = branchTarget(pc); 756019Shines@cs.fsu.edu return true; 766019Shines@cs.fsu.edu } 776019Shines@cs.fsu.edu 786019Shines@cs.fsu.edu if (isIndirectCtrl()) { 796019Shines@cs.fsu.edu tgt = branchTarget(tc); 806019Shines@cs.fsu.edu return true; 816019Shines@cs.fsu.edu } 826019Shines@cs.fsu.edu 83 return false; 84} 85 86StaticInstPtr 87StaticInst::fetchMicroop(MicroPC micropc) 88{ 89 panic("StaticInst::fetchMicroop() called on instruction " 90 "that is not microcoded."); 91} 92 93Addr 94StaticInst::branchTarget(Addr branchPC) const 95{ 96 panic("StaticInst::branchTarget() called on instruction " 97 "that is not a PC-relative branch."); 98 M5_DUMMY_RETURN; 99} 100 101Addr 102StaticInst::branchTarget(ThreadContext *tc) const 103{ 104 panic("StaticInst::branchTarget() called on instruction " 105 "that is not an indirect branch."); 106 M5_DUMMY_RETURN; 107} 108 109Request::Flags 110StaticInst::memAccFlags() 111{ 112 panic("StaticInst::memAccFlags called on non-memory instruction"); 113 return 0; 114} 115 116const string & 117StaticInst::disassemble(Addr pc, const SymbolTable *symtab) const 118{ 119 if (!cachedDisassembly) 120 cachedDisassembly = new string(generateDisassembly(pc, symtab)); 121 122 return *cachedDisassembly; 123} 124