simple_thread.cc revision 8820
1/* 2 * Copyright (c) 2001-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Steve Reinhardt 29 * Nathan Binkert 30 * Lisa Hsu 31 * Kevin Lim 32 */ 33 34#include <string> 35 36#include "arch/isa_traits.hh" 37#include "arch/kernel_stats.hh" 38#include "arch/stacktrace.hh" 39#include "arch/utility.hh" 40#include "base/callback.hh" 41#include "base/cprintf.hh" 42#include "base/output.hh" 43#include "base/trace.hh" 44#include "config/the_isa.hh" 45#include "cpu/base.hh" 46#include "cpu/profile.hh" 47#include "cpu/quiesce_event.hh" 48#include "cpu/simple_thread.hh" 49#include "cpu/thread_context.hh" 50#include "mem/fs_translating_port_proxy.hh" 51#include "mem/se_translating_port_proxy.hh" 52#include "params/BaseCPU.hh" 53#include "sim/full_system.hh" 54#include "sim/process.hh" 55#include "sim/serialize.hh" 56#include "sim/sim_exit.hh" 57#include "sim/system.hh" 58 59using namespace std; 60 61// constructor 62SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys, 63 Process *_process, TheISA::TLB *_itb, 64 TheISA::TLB *_dtb) 65 : ThreadState(_cpu, _thread_num, _process), system(_sys), itb(_itb), 66 dtb(_dtb) 67{ 68 clearArchRegs(); 69 tc = new ProxyThreadContext<SimpleThread>(this); 70} 71SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys, 72 TheISA::TLB *_itb, TheISA::TLB *_dtb, 73 bool use_kernel_stats) 74 : ThreadState(_cpu, _thread_num, NULL), system(_sys), itb(_itb), dtb(_dtb) 75{ 76 tc = new ProxyThreadContext<SimpleThread>(this); 77 78 quiesceEvent = new EndQuiesceEvent(tc); 79 80 clearArchRegs(); 81 82 if (baseCpu->params()->profile) { 83 profile = new FunctionProfile(system->kernelSymtab); 84 Callback *cb = 85 new MakeCallback<SimpleThread, 86 &SimpleThread::dumpFuncProfile>(this); 87 registerExitCallback(cb); 88 } 89 90 // let's fill with a dummy node for now so we don't get a segfault 91 // on the first cycle when there's no node available. 92 static ProfileNode dummyNode; 93 profileNode = &dummyNode; 94 profilePC = 3; 95 96 if (use_kernel_stats) 97 kernelStats = new TheISA::Kernel::Statistics(system); 98} 99 100SimpleThread::SimpleThread() 101 : ThreadState(NULL, -1, NULL) 102{ 103 tc = new ProxyThreadContext<SimpleThread>(this); 104} 105 106SimpleThread::~SimpleThread() 107{ 108 delete tc; 109} 110 111void 112SimpleThread::takeOverFrom(ThreadContext *oldContext) 113{ 114 // some things should already be set up 115 if (FullSystem) 116 assert(system == oldContext->getSystemPtr()); 117 assert(process == oldContext->getProcessPtr()); 118 119 copyState(oldContext); 120 if (FullSystem) { 121 EndQuiesceEvent *quiesce = oldContext->getQuiesceEvent(); 122 if (quiesce) { 123 // Point the quiesce event's TC at this TC so that it wakes up 124 // the proper CPU. 125 quiesce->tc = tc; 126 } 127 if (quiesceEvent) { 128 quiesceEvent->tc = tc; 129 } 130 131 TheISA::Kernel::Statistics *stats = oldContext->getKernelStats(); 132 if (stats) { 133 kernelStats = stats; 134 } 135 } 136 137 storeCondFailures = 0; 138 139 oldContext->setStatus(ThreadContext::Halted); 140} 141 142void 143SimpleThread::copyTC(ThreadContext *context) 144{ 145 copyState(context); 146 147 if (FullSystem) { 148 EndQuiesceEvent *quiesce = context->getQuiesceEvent(); 149 if (quiesce) { 150 quiesceEvent = quiesce; 151 } 152 TheISA::Kernel::Statistics *stats = context->getKernelStats(); 153 if (stats) { 154 kernelStats = stats; 155 } 156 } 157} 158 159void 160SimpleThread::copyState(ThreadContext *oldContext) 161{ 162 // copy over functional state 163 _status = oldContext->status(); 164 copyArchRegs(oldContext); 165 if (FullSystem) 166 funcExeInst = oldContext->readFuncExeInst(); 167 168 _threadId = oldContext->threadId(); 169 _contextId = oldContext->contextId(); 170} 171 172void 173SimpleThread::serialize(ostream &os) 174{ 175 ThreadState::serialize(os); 176 SERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs); 177 SERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs); 178 _pcState.serialize(os); 179 // thread_num and cpu_id are deterministic from the config 180 181 // 182 // Now must serialize all the ISA dependent state 183 // 184 isa.serialize(baseCpu, os); 185} 186 187 188void 189SimpleThread::unserialize(Checkpoint *cp, const std::string §ion) 190{ 191 ThreadState::unserialize(cp, section); 192 UNSERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs); 193 UNSERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs); 194 _pcState.unserialize(cp, section); 195 // thread_num and cpu_id are deterministic from the config 196 197 // 198 // Now must unserialize all the ISA dependent state 199 // 200 isa.unserialize(baseCpu, cp, section); 201} 202 203void 204SimpleThread::dumpFuncProfile() 205{ 206 std::ostream *os = simout.create(csprintf("profile.%s.dat", 207 baseCpu->name())); 208 profile->dump(tc, *os); 209} 210 211void 212SimpleThread::activate(int delay) 213{ 214 if (status() == ThreadContext::Active) 215 return; 216 217 lastActivate = curTick(); 218 219// if (status() == ThreadContext::Unallocated) { 220// cpu->activateWhenReady(_threadId); 221// return; 222// } 223 224 _status = ThreadContext::Active; 225 226 // status() == Suspended 227 baseCpu->activateContext(_threadId, delay); 228} 229 230void 231SimpleThread::suspend() 232{ 233 if (status() == ThreadContext::Suspended) 234 return; 235 236 lastActivate = curTick(); 237 lastSuspend = curTick(); 238 _status = ThreadContext::Suspended; 239 baseCpu->suspendContext(_threadId); 240} 241 242 243void 244SimpleThread::halt() 245{ 246 if (status() == ThreadContext::Halted) 247 return; 248 249 _status = ThreadContext::Halted; 250 baseCpu->haltContext(_threadId); 251} 252 253 254void 255SimpleThread::regStats(const string &name) 256{ 257 if (FullSystem && kernelStats) 258 kernelStats->regStats(name + ".kern"); 259} 260 261void 262SimpleThread::copyArchRegs(ThreadContext *src_tc) 263{ 264 TheISA::copyRegs(src_tc, tc); 265} 266 267