simple_thread.cc revision 6331 
1/*
2 * Copyright (c) 2001-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 *          Nathan Binkert
30 *          Lisa Hsu
31 *          Kevin Lim
32 */
33
34#include <string>
35
36#include "arch/isa_traits.hh"
37#include "cpu/base.hh"
38#include "cpu/simple_thread.hh"
39#include "cpu/thread_context.hh"
40#include "params/BaseCPU.hh"
41
42#if FULL_SYSTEM
43#include "arch/kernel_stats.hh"
44#include "arch/stacktrace.hh"
45#include "base/callback.hh"
46#include "base/cprintf.hh"
47#include "base/output.hh"
48#include "base/trace.hh"
49#include "cpu/profile.hh"
50#include "cpu/quiesce_event.hh"
51#include "sim/serialize.hh"
52#include "sim/sim_exit.hh"
53#else
54#include "mem/translating_port.hh"
55#include "sim/process.hh"
56#include "sim/system.hh"
57#endif
58
59using namespace std;
60
61// constructor
62#if FULL_SYSTEM
63SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
64                           TheISA::TLB *_itb, TheISA::TLB *_dtb,
65                           bool use_kernel_stats)
66    : ThreadState(_cpu, _thread_num),
67      cpu(_cpu), system(_sys), itb(_itb), dtb(_dtb)
68
69{
70    tc = new ProxyThreadContext<SimpleThread>(this);
71
72    quiesceEvent = new EndQuiesceEvent(tc);
73
74    clearArchRegs();
75
76    if (cpu->params()->profile) {
77        profile = new FunctionProfile(system->kernelSymtab);
78        Callback *cb =
79            new MakeCallback<SimpleThread,
80            &SimpleThread::dumpFuncProfile>(this);
81        registerExitCallback(cb);
82    }
83
84    // let's fill with a dummy node for now so we don't get a segfault
85    // on the first cycle when there's no node available.
86    static ProfileNode dummyNode;
87    profileNode = &dummyNode;
88    profilePC = 3;
89
90    if (use_kernel_stats)
91        kernelStats = new TheISA::Kernel::Statistics(system);
92}
93#else
94SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process,
95                           TheISA::TLB *_itb, TheISA::TLB *_dtb)
96    : ThreadState(_cpu, _thread_num, _process),
97      cpu(_cpu), itb(_itb), dtb(_dtb)
98{
99    clearArchRegs();
100    tc = new ProxyThreadContext<SimpleThread>(this);
101}
102
103#endif
104
105SimpleThread::SimpleThread()
106#if FULL_SYSTEM
107    : ThreadState(NULL, -1)
108#else
109    : ThreadState(NULL, -1, NULL)
110#endif
111{
112    tc = new ProxyThreadContext<SimpleThread>(this);
113}
114
115SimpleThread::~SimpleThread()
116{
117#if FULL_SYSTEM
118    delete physPort;
119    delete virtPort;
120#endif
121    delete tc;
122}
123
124void
125SimpleThread::takeOverFrom(ThreadContext *oldContext)
126{
127    // some things should already be set up
128#if FULL_SYSTEM
129    assert(system == oldContext->getSystemPtr());
130#else
131    assert(process == oldContext->getProcessPtr());
132#endif
133
134    copyState(oldContext);
135#if FULL_SYSTEM
136    EndQuiesceEvent *quiesce = oldContext->getQuiesceEvent();
137    if (quiesce) {
138        // Point the quiesce event's TC at this TC so that it wakes up
139        // the proper CPU.
140        quiesce->tc = tc;
141    }
142    if (quiesceEvent) {
143        quiesceEvent->tc = tc;
144    }
145
146    TheISA::Kernel::Statistics *stats = oldContext->getKernelStats();
147    if (stats) {
148        kernelStats = stats;
149    }
150#endif
151
152    storeCondFailures = 0;
153
154    oldContext->setStatus(ThreadContext::Halted);
155}
156
157void
158SimpleThread::copyTC(ThreadContext *context)
159{
160    copyState(context);
161
162#if FULL_SYSTEM
163    EndQuiesceEvent *quiesce = context->getQuiesceEvent();
164    if (quiesce) {
165        quiesceEvent = quiesce;
166    }
167    TheISA::Kernel::Statistics *stats = context->getKernelStats();
168    if (stats) {
169        kernelStats = stats;
170    }
171#endif
172}
173
174void
175SimpleThread::copyState(ThreadContext *oldContext)
176{
177    // copy over functional state
178    _status = oldContext->status();
179    copyArchRegs(oldContext);
180#if !FULL_SYSTEM
181    funcExeInst = oldContext->readFuncExeInst();
182#endif
183    inst = oldContext->getInst();
184
185    _threadId = oldContext->threadId();
186    _contextId = oldContext->contextId();
187}
188
189void
190SimpleThread::serialize(ostream &os)
191{
192    ThreadState::serialize(os);
193    SERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs);
194    SERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs);
195    SERIALIZE_SCALAR(microPC);
196    SERIALIZE_SCALAR(nextMicroPC);
197    SERIALIZE_SCALAR(PC);
198    SERIALIZE_SCALAR(nextPC);
199    SERIALIZE_SCALAR(nextNPC);
200    // thread_num and cpu_id are deterministic from the config
201}
202
203
204void
205SimpleThread::unserialize(Checkpoint *cp, const std::string &section)
206{
207    ThreadState::unserialize(cp, section);
208    UNSERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs);
209    UNSERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs);
210    UNSERIALIZE_SCALAR(microPC);
211    UNSERIALIZE_SCALAR(nextMicroPC);
212    UNSERIALIZE_SCALAR(PC);
213    UNSERIALIZE_SCALAR(nextPC);
214    UNSERIALIZE_SCALAR(nextNPC);
215    // thread_num and cpu_id are deterministic from the config
216}
217
218#if FULL_SYSTEM
219void
220SimpleThread::dumpFuncProfile()
221{
222    std::ostream *os = simout.create(csprintf("profile.%s.dat", cpu->name()));
223    profile->dump(tc, *os);
224}
225#endif
226
227void
228SimpleThread::activate(int delay)
229{
230    if (status() == ThreadContext::Active)
231        return;
232
233    lastActivate = curTick;
234
235//    if (status() == ThreadContext::Unallocated) {
236//      cpu->activateWhenReady(_threadId);
237//      return;
238//   }
239
240    _status = ThreadContext::Active;
241
242    // status() == Suspended
243    cpu->activateContext(_threadId, delay);
244}
245
246void
247SimpleThread::suspend()
248{
249    if (status() == ThreadContext::Suspended)
250        return;
251
252    lastActivate = curTick;
253    lastSuspend = curTick;
254/*
255#if FULL_SYSTEM
256    // Don't change the status from active if there are pending interrupts
257    if (cpu->checkInterrupts()) {
258        assert(status() == ThreadContext::Active);
259        return;
260    }
261#endif
262*/
263    _status = ThreadContext::Suspended;
264    cpu->suspendContext(_threadId);
265}
266
267
268void
269SimpleThread::halt()
270{
271    if (status() == ThreadContext::Halted)
272        return;
273
274    _status = ThreadContext::Halted;
275    cpu->haltContext(_threadId);
276}
277
278
279void
280SimpleThread::regStats(const string &name)
281{
282#if FULL_SYSTEM
283    if (kernelStats)
284        kernelStats->regStats(name + ".kern");
285#endif
286}
287
288void
289SimpleThread::copyArchRegs(ThreadContext *src_tc)
290{
291    TheISA::copyRegs(src_tc, tc);
292}
293
294