simple_thread.cc revision 13910:d5deee7b4279 
1/*
2 * Copyright (c) 2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2001-2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Steve Reinhardt
41 *          Nathan Binkert
42 *          Lisa Hsu
43 *          Kevin Lim
44 */
45
46#include "cpu/simple_thread.hh"
47
48#include <string>
49
50#include "arch/isa_traits.hh"
51#include "arch/kernel_stats.hh"
52#include "arch/stacktrace.hh"
53#include "arch/utility.hh"
54#include "base/callback.hh"
55#include "base/cprintf.hh"
56#include "base/output.hh"
57#include "base/trace.hh"
58#include "config/the_isa.hh"
59#include "cpu/base.hh"
60#include "cpu/profile.hh"
61#include "cpu/quiesce_event.hh"
62#include "cpu/thread_context.hh"
63#include "mem/fs_translating_port_proxy.hh"
64#include "mem/se_translating_port_proxy.hh"
65#include "params/BaseCPU.hh"
66#include "sim/faults.hh"
67#include "sim/full_system.hh"
68#include "sim/process.hh"
69#include "sim/serialize.hh"
70#include "sim/sim_exit.hh"
71#include "sim/system.hh"
72
73using namespace std;
74
75// constructor
76SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
77                           Process *_process, BaseTLB *_itb,
78                           BaseTLB *_dtb, TheISA::ISA *_isa)
79    : ThreadState(_cpu, _thread_num, _process), isa(_isa),
80      predicate(false), system(_sys),
81      itb(_itb), dtb(_dtb), decoder(TheISA::Decoder(_isa))
82{
83    clearArchRegs();
84    quiesceEvent = new EndQuiesceEvent(this);
85}
86
87SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
88                           BaseTLB *_itb, BaseTLB *_dtb,
89                           TheISA::ISA *_isa, bool use_kernel_stats)
90    : ThreadState(_cpu, _thread_num, NULL), isa(_isa), system(_sys), itb(_itb),
91      dtb(_dtb), decoder(TheISA::Decoder(_isa))
92{
93    quiesceEvent = new EndQuiesceEvent(this);
94
95    clearArchRegs();
96
97    if (baseCpu->params()->profile) {
98        profile = new FunctionProfile(system->kernelSymtab);
99        Callback *cb =
100            new MakeCallback<SimpleThread,
101            &SimpleThread::dumpFuncProfile>(this);
102        registerExitCallback(cb);
103    }
104
105    // let's fill with a dummy node for now so we don't get a segfault
106    // on the first cycle when there's no node available.
107    static ProfileNode dummyNode;
108    profileNode = &dummyNode;
109    profilePC = 3;
110
111    if (use_kernel_stats)
112        kernelStats = new TheISA::Kernel::Statistics();
113}
114
115void
116SimpleThread::takeOverFrom(ThreadContext *oldContext)
117{
118    ::takeOverFrom(*this, *oldContext);
119    decoder.takeOverFrom(oldContext->getDecoderPtr());
120
121    kernelStats = oldContext->getKernelStats();
122    funcExeInst = oldContext->readFuncExeInst();
123    storeCondFailures = 0;
124}
125
126void
127SimpleThread::copyState(ThreadContext *oldContext)
128{
129    // copy over functional state
130    _status = oldContext->status();
131    copyArchRegs(oldContext);
132    if (FullSystem)
133        funcExeInst = oldContext->readFuncExeInst();
134
135    _threadId = oldContext->threadId();
136    _contextId = oldContext->contextId();
137}
138
139void
140SimpleThread::serialize(CheckpointOut &cp) const
141{
142    ThreadState::serialize(cp);
143    ::serialize(*this, cp);
144}
145
146
147void
148SimpleThread::unserialize(CheckpointIn &cp)
149{
150    ThreadState::unserialize(cp);
151    ::unserialize(*this, cp);
152}
153
154void
155SimpleThread::startup()
156{
157    isa->startup(this);
158}
159
160void
161SimpleThread::dumpFuncProfile()
162{
163    OutputStream *os(simout.create(csprintf("profile.%s.dat", baseCpu->name())));
164    profile->dump(this, *os->stream());
165    simout.close(os);
166}
167
168void
169SimpleThread::activate()
170{
171    if (status() == ThreadContext::Active)
172        return;
173
174    lastActivate = curTick();
175    _status = ThreadContext::Active;
176    baseCpu->activateContext(_threadId);
177}
178
179void
180SimpleThread::suspend()
181{
182    if (status() == ThreadContext::Suspended)
183        return;
184
185    lastActivate = curTick();
186    lastSuspend = curTick();
187    _status = ThreadContext::Suspended;
188    baseCpu->suspendContext(_threadId);
189}
190
191
192void
193SimpleThread::halt()
194{
195    if (status() == ThreadContext::Halted)
196        return;
197
198    _status = ThreadContext::Halted;
199    baseCpu->haltContext(_threadId);
200}
201
202
203void
204SimpleThread::regStats(const string &name)
205{
206    if (FullSystem && kernelStats)
207        kernelStats->regStats(name + ".kern");
208}
209
210void
211SimpleThread::copyArchRegs(ThreadContext *src_tc)
212{
213    TheISA::copyRegs(src_tc, this);
214}
215