simple_thread.cc revision 7720
112027Sjungma@eit.uni-kl.de/* 212027Sjungma@eit.uni-kl.de * Copyright (c) 2001-2006 The Regents of The University of Michigan 312027Sjungma@eit.uni-kl.de * All rights reserved. 412027Sjungma@eit.uni-kl.de * 512027Sjungma@eit.uni-kl.de * Redistribution and use in source and binary forms, with or without 612027Sjungma@eit.uni-kl.de * modification, are permitted provided that the following conditions are 712027Sjungma@eit.uni-kl.de * met: redistributions of source code must retain the above copyright 812027Sjungma@eit.uni-kl.de * notice, this list of conditions and the following disclaimer; 912027Sjungma@eit.uni-kl.de * redistributions in binary form must reproduce the above copyright 1012027Sjungma@eit.uni-kl.de * notice, this list of conditions and the following disclaimer in the 1112027Sjungma@eit.uni-kl.de * documentation and/or other materials provided with the distribution; 1212027Sjungma@eit.uni-kl.de * neither the name of the copyright holders nor the names of its 1312027Sjungma@eit.uni-kl.de * contributors may be used to endorse or promote products derived from 1412027Sjungma@eit.uni-kl.de * this software without specific prior written permission. 1512027Sjungma@eit.uni-kl.de * 1612027Sjungma@eit.uni-kl.de * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1712027Sjungma@eit.uni-kl.de * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1812027Sjungma@eit.uni-kl.de * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1912027Sjungma@eit.uni-kl.de * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2012027Sjungma@eit.uni-kl.de * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2112027Sjungma@eit.uni-kl.de * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2212027Sjungma@eit.uni-kl.de * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2312027Sjungma@eit.uni-kl.de * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2412027Sjungma@eit.uni-kl.de * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2512027Sjungma@eit.uni-kl.de * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2612027Sjungma@eit.uni-kl.de * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2712027Sjungma@eit.uni-kl.de * 2812027Sjungma@eit.uni-kl.de * Authors: Steve Reinhardt 2912027Sjungma@eit.uni-kl.de * Nathan Binkert 3012027Sjungma@eit.uni-kl.de * Lisa Hsu 3112027Sjungma@eit.uni-kl.de * Kevin Lim 3212027Sjungma@eit.uni-kl.de */ 3312027Sjungma@eit.uni-kl.de 3412027Sjungma@eit.uni-kl.de#include <string> 3512027Sjungma@eit.uni-kl.de 3612027Sjungma@eit.uni-kl.de#include "arch/isa_traits.hh" 3712027Sjungma@eit.uni-kl.de#include "arch/utility.hh" 3812027Sjungma@eit.uni-kl.de#include "config/the_isa.hh" 3912027Sjungma@eit.uni-kl.de#include "cpu/base.hh" 4012027Sjungma@eit.uni-kl.de#include "cpu/simple_thread.hh" 4112027Sjungma@eit.uni-kl.de#include "cpu/thread_context.hh" 4212027Sjungma@eit.uni-kl.de#include "params/BaseCPU.hh" 4312027Sjungma@eit.uni-kl.de 4412027Sjungma@eit.uni-kl.de#if FULL_SYSTEM 4512027Sjungma@eit.uni-kl.de#include "arch/kernel_stats.hh" 4612027Sjungma@eit.uni-kl.de#include "arch/stacktrace.hh" 4712027Sjungma@eit.uni-kl.de#include "base/callback.hh" 4812027Sjungma@eit.uni-kl.de#include "base/cprintf.hh" 4912027Sjungma@eit.uni-kl.de#include "base/output.hh" 5012027Sjungma@eit.uni-kl.de#include "base/trace.hh" 5112027Sjungma@eit.uni-kl.de#include "cpu/profile.hh" 5212027Sjungma@eit.uni-kl.de#include "cpu/quiesce_event.hh" 5312027Sjungma@eit.uni-kl.de#include "sim/serialize.hh" 5412027Sjungma@eit.uni-kl.de#include "sim/sim_exit.hh" 5512027Sjungma@eit.uni-kl.de#else 5612027Sjungma@eit.uni-kl.de#include "mem/translating_port.hh" 5712027Sjungma@eit.uni-kl.de#include "sim/process.hh" 5812027Sjungma@eit.uni-kl.de#include "sim/system.hh" 5912027Sjungma@eit.uni-kl.de#endif 6012027Sjungma@eit.uni-kl.de 6112027Sjungma@eit.uni-kl.deusing namespace std; 6212027Sjungma@eit.uni-kl.de 6312027Sjungma@eit.uni-kl.de// constructor 6412027Sjungma@eit.uni-kl.de#if FULL_SYSTEM 6512027Sjungma@eit.uni-kl.deSimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys, 6612027Sjungma@eit.uni-kl.de TheISA::TLB *_itb, TheISA::TLB *_dtb, 6712027Sjungma@eit.uni-kl.de bool use_kernel_stats) 6812027Sjungma@eit.uni-kl.de : ThreadState(_cpu, _thread_num), 6912027Sjungma@eit.uni-kl.de cpu(_cpu), system(_sys), itb(_itb), dtb(_dtb) 7012027Sjungma@eit.uni-kl.de 7112027Sjungma@eit.uni-kl.de{ 7212027Sjungma@eit.uni-kl.de tc = new ProxyThreadContext<SimpleThread>(this); 7312027Sjungma@eit.uni-kl.de 7412027Sjungma@eit.uni-kl.de quiesceEvent = new EndQuiesceEvent(tc); 7512027Sjungma@eit.uni-kl.de 7612027Sjungma@eit.uni-kl.de clearArchRegs(); 7712027Sjungma@eit.uni-kl.de 7812027Sjungma@eit.uni-kl.de if (cpu->params()->profile) { 7912027Sjungma@eit.uni-kl.de profile = new FunctionProfile(system->kernelSymtab); 8012027Sjungma@eit.uni-kl.de Callback *cb = 8112027Sjungma@eit.uni-kl.de new MakeCallback<SimpleThread, 8212027Sjungma@eit.uni-kl.de &SimpleThread::dumpFuncProfile>(this); 8312027Sjungma@eit.uni-kl.de registerExitCallback(cb); 8412027Sjungma@eit.uni-kl.de } 8512027Sjungma@eit.uni-kl.de 8612027Sjungma@eit.uni-kl.de // let's fill with a dummy node for now so we don't get a segfault 8712027Sjungma@eit.uni-kl.de // on the first cycle when there's no node available. 8812027Sjungma@eit.uni-kl.de static ProfileNode dummyNode; 8912027Sjungma@eit.uni-kl.de profileNode = &dummyNode; 9012027Sjungma@eit.uni-kl.de profilePC = 3; 9112027Sjungma@eit.uni-kl.de 9212027Sjungma@eit.uni-kl.de if (use_kernel_stats) 9312027Sjungma@eit.uni-kl.de kernelStats = new TheISA::Kernel::Statistics(system); 9412027Sjungma@eit.uni-kl.de} 9512027Sjungma@eit.uni-kl.de#else 9612027Sjungma@eit.uni-kl.deSimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process, 9712027Sjungma@eit.uni-kl.de TheISA::TLB *_itb, TheISA::TLB *_dtb) 9812027Sjungma@eit.uni-kl.de : ThreadState(_cpu, _thread_num, _process), 9912027Sjungma@eit.uni-kl.de cpu(_cpu), itb(_itb), dtb(_dtb) 10012027Sjungma@eit.uni-kl.de{ 10112027Sjungma@eit.uni-kl.de clearArchRegs(); 10212027Sjungma@eit.uni-kl.de tc = new ProxyThreadContext<SimpleThread>(this); 10312027Sjungma@eit.uni-kl.de} 10412027Sjungma@eit.uni-kl.de 10512027Sjungma@eit.uni-kl.de#endif 10612027Sjungma@eit.uni-kl.de 10712027Sjungma@eit.uni-kl.deSimpleThread::SimpleThread() 10812027Sjungma@eit.uni-kl.de#if FULL_SYSTEM 10912027Sjungma@eit.uni-kl.de : ThreadState(NULL, -1) 11012027Sjungma@eit.uni-kl.de#else 11112027Sjungma@eit.uni-kl.de : ThreadState(NULL, -1, NULL) 11212027Sjungma@eit.uni-kl.de#endif 11312027Sjungma@eit.uni-kl.de{ 11412027Sjungma@eit.uni-kl.de tc = new ProxyThreadContext<SimpleThread>(this); 11512027Sjungma@eit.uni-kl.de} 11612027Sjungma@eit.uni-kl.de 11712027Sjungma@eit.uni-kl.deSimpleThread::~SimpleThread() 11812027Sjungma@eit.uni-kl.de{ 11912027Sjungma@eit.uni-kl.de#if FULL_SYSTEM 12012027Sjungma@eit.uni-kl.de delete physPort; 12112027Sjungma@eit.uni-kl.de delete virtPort; 12212027Sjungma@eit.uni-kl.de#endif 12312027Sjungma@eit.uni-kl.de delete tc; 12412027Sjungma@eit.uni-kl.de} 125 126void 127SimpleThread::takeOverFrom(ThreadContext *oldContext) 128{ 129 // some things should already be set up 130#if FULL_SYSTEM 131 assert(system == oldContext->getSystemPtr()); 132#else 133 assert(process == oldContext->getProcessPtr()); 134#endif 135 136 copyState(oldContext); 137#if FULL_SYSTEM 138 EndQuiesceEvent *quiesce = oldContext->getQuiesceEvent(); 139 if (quiesce) { 140 // Point the quiesce event's TC at this TC so that it wakes up 141 // the proper CPU. 142 quiesce->tc = tc; 143 } 144 if (quiesceEvent) { 145 quiesceEvent->tc = tc; 146 } 147 148 TheISA::Kernel::Statistics *stats = oldContext->getKernelStats(); 149 if (stats) { 150 kernelStats = stats; 151 } 152#endif 153 154 storeCondFailures = 0; 155 156 oldContext->setStatus(ThreadContext::Halted); 157} 158 159void 160SimpleThread::copyTC(ThreadContext *context) 161{ 162 copyState(context); 163 164#if FULL_SYSTEM 165 EndQuiesceEvent *quiesce = context->getQuiesceEvent(); 166 if (quiesce) { 167 quiesceEvent = quiesce; 168 } 169 TheISA::Kernel::Statistics *stats = context->getKernelStats(); 170 if (stats) { 171 kernelStats = stats; 172 } 173#endif 174} 175 176void 177SimpleThread::copyState(ThreadContext *oldContext) 178{ 179 // copy over functional state 180 _status = oldContext->status(); 181 copyArchRegs(oldContext); 182#if !FULL_SYSTEM 183 funcExeInst = oldContext->readFuncExeInst(); 184#endif 185 186 _threadId = oldContext->threadId(); 187 _contextId = oldContext->contextId(); 188} 189 190void 191SimpleThread::serialize(ostream &os) 192{ 193 ThreadState::serialize(os); 194 SERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs); 195 SERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs); 196 _pcState.serialize(os); 197 // thread_num and cpu_id are deterministic from the config 198 199 // 200 // Now must serialize all the ISA dependent state 201 // 202 isa.serialize(cpu, os); 203} 204 205 206void 207SimpleThread::unserialize(Checkpoint *cp, const std::string §ion) 208{ 209 ThreadState::unserialize(cp, section); 210 UNSERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs); 211 UNSERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs); 212 _pcState.unserialize(cp, section); 213 // thread_num and cpu_id are deterministic from the config 214 215 // 216 // Now must unserialize all the ISA dependent state 217 // 218 isa.unserialize(cpu, cp, section); 219} 220 221#if FULL_SYSTEM 222void 223SimpleThread::dumpFuncProfile() 224{ 225 std::ostream *os = simout.create(csprintf("profile.%s.dat", cpu->name())); 226 profile->dump(tc, *os); 227} 228#endif 229 230void 231SimpleThread::activate(int delay) 232{ 233 if (status() == ThreadContext::Active) 234 return; 235 236 lastActivate = curTick; 237 238// if (status() == ThreadContext::Unallocated) { 239// cpu->activateWhenReady(_threadId); 240// return; 241// } 242 243 _status = ThreadContext::Active; 244 245 // status() == Suspended 246 cpu->activateContext(_threadId, delay); 247} 248 249void 250SimpleThread::suspend() 251{ 252 if (status() == ThreadContext::Suspended) 253 return; 254 255 lastActivate = curTick; 256 lastSuspend = curTick; 257/* 258#if FULL_SYSTEM 259 // Don't change the status from active if there are pending interrupts 260 if (cpu->checkInterrupts()) { 261 assert(status() == ThreadContext::Active); 262 return; 263 } 264#endif 265*/ 266 _status = ThreadContext::Suspended; 267 cpu->suspendContext(_threadId); 268} 269 270 271void 272SimpleThread::halt() 273{ 274 if (status() == ThreadContext::Halted) 275 return; 276 277 _status = ThreadContext::Halted; 278 cpu->haltContext(_threadId); 279} 280 281 282void 283SimpleThread::regStats(const string &name) 284{ 285#if FULL_SYSTEM 286 if (kernelStats) 287 kernelStats->regStats(name + ".kern"); 288#endif 289} 290 291void 292SimpleThread::copyArchRegs(ThreadContext *src_tc) 293{ 294 TheISA::copyRegs(src_tc, tc); 295} 296 297