simple_thread.cc revision 1858
12SN/A/*
28922Swilliam.wang@arm.com * Copyright (c) 2001-2005 The Regents of The University of Michigan
38707Sandreas.hansson@arm.com * All rights reserved.
48707Sandreas.hansson@arm.com *
58707Sandreas.hansson@arm.com * Redistribution and use in source and binary forms, with or without
68707Sandreas.hansson@arm.com * modification, are permitted provided that the following conditions are
78707Sandreas.hansson@arm.com * met: redistributions of source code must retain the above copyright
88707Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer;
98707Sandreas.hansson@arm.com * redistributions in binary form must reproduce the above copyright
108707Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer in the
118707Sandreas.hansson@arm.com * documentation and/or other materials provided with the distribution;
128707Sandreas.hansson@arm.com * neither the name of the copyright holders nor the names of its
138707Sandreas.hansson@arm.com * contributors may be used to endorse or promote products derived from
141762SN/A * this software without specific prior written permission.
157897Shestness@cs.utexas.edu *
162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272SN/A */
282SN/A
292SN/A#include <string>
302SN/A
312SN/A#include "cpu/base.hh"
322SN/A#include "cpu/exec_context.hh"
332SN/A
342SN/A#if FULL_SYSTEM
352SN/A#include "base/cprintf.hh"
362SN/A#include "kern/kernel_stats.hh"
372SN/A#include "sim/serialize.hh"
382SN/A#include "sim/system.hh"
392SN/A#else
402665Ssaidi@eecs.umich.edu#include "sim/process.hh"
412665Ssaidi@eecs.umich.edu#endif
422665Ssaidi@eecs.umich.edu
437897Shestness@cs.utexas.eduusing namespace std;
442SN/A
452SN/A// constructor
461388SN/A#if FULL_SYSTEM
478229Snate@binkert.orgExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, System *_sys,
482SN/A                         AlphaITB *_itb, AlphaDTB *_dtb,
492SN/A                         FunctionalMemory *_mem)
507781SAli.Saidi@ARM.com    : _status(ExecContext::Unallocated), cpu(_cpu), thread_num(_thread_num),
518229Snate@binkert.org      cpu_id(-1), mem(_mem), itb(_itb), dtb(_dtb), system(_sys),
521191SN/A      memctrl(_sys->memctrl), physmem(_sys->physmem),
531191SN/A      kernelBinning(system->kernelBinning), bin(kernelBinning->bin),
541388SN/A      fnbin(kernelBinning->fnbin), func_exe_inst(0), storeCondFailures(0)
555529Snate@binkert.org{
561717SN/A    kernelStats = new Kernel::Statistics(this);
578887Sgeoffrey.blake@arm.com    memset(&regs, 0, sizeof(RegFile));
582651Ssaidi@eecs.umich.edu}
598229Snate@binkert.org#else
602680Sktlim@umich.eduExecContext::ExecContext(BaseCPU *_cpu, int _thread_num,
618232Snate@binkert.org                         Process *_process, int _asid)
625529Snate@binkert.org    : _status(ExecContext::Unallocated),
638779Sgblack@eecs.umich.edu      cpu(_cpu), thread_num(_thread_num), cpu_id(-1),
642190SN/A      process(_process), mem(process->getMemory()), asid(_asid),
6556SN/A      func_exe_inst(0), storeCondFailures(0)
668229Snate@binkert.org{
672190SN/A    memset(&regs, 0, sizeof(RegFile));
682SN/A}
692359SN/A
702359SN/AExecContext::ExecContext(BaseCPU *_cpu, int _thread_num,
712359SN/A                         FunctionalMemory *_mem, int _asid)
722SN/A    : cpu(_cpu), thread_num(_thread_num), process(0), mem(_mem), asid(_asid),
732SN/A      func_exe_inst(0), storeCondFailures(0)
742SN/A{
752SN/A    memset(&regs, 0, sizeof(RegFile));
762SN/A}
772SN/A#endif
782SN/A
792SN/AExecContext::~ExecContext()
802SN/A{
815606Snate@binkert.org#if FULL_SYSTEM
826144Sksewell@umich.edu    delete kernelStats;
836144Sksewell@umich.edu#endif
843126Sktlim@umich.edu}
856144Sksewell@umich.edu
867823Ssteve.reinhardt@amd.com
873126Sktlim@umich.eduvoid
883126Sktlim@umich.eduExecContext::takeOverFrom(ExecContext *oldContext)
892356SN/A{
902356SN/A    // some things should already be set up
912356SN/A    assert(mem == oldContext->mem);
928834Satgutier@umich.edu#if FULL_SYSTEM
932356SN/A    assert(system == oldContext->system);
946144Sksewell@umich.edu#else
952367SN/A    assert(process == oldContext->process);
966144Sksewell@umich.edu#endif
976144Sksewell@umich.edu
986144Sksewell@umich.edu    // copy over functional state
992356SN/A    _status = oldContext->_status;
1002367SN/A    regs = oldContext->regs;
1016144Sksewell@umich.edu    cpu_id = oldContext->cpu_id;
1027823Ssteve.reinhardt@amd.com    func_exe_inst = oldContext->func_exe_inst;
1036144Sksewell@umich.edu
1042367SN/A    storeCondFailures = 0;
1052356SN/A
1066144Sksewell@umich.edu    oldContext->_status = ExecContext::Unallocated;
1076144Sksewell@umich.edu}
1087823Ssteve.reinhardt@amd.com
1092356SN/A#if FULL_SYSTEM
1102356SN/Avoid
1112356SN/AExecContext::execute(const StaticInstBase *inst)
1125336Shines@cs.fsu.edu{
1132356SN/A    assert(kernelStats);
1144873Sstever@eecs.umich.edu    system->kernelBinning->execute(this, inst);
1152356SN/A}
1162356SN/A#endif
1178876Sandreas.hansson@arm.com
1189157Sandreas.hansson@arm.comvoid
1198832SAli.Saidi@ARM.comExecContext::serialize(ostream &os)
1208832SAli.Saidi@ARM.com{
1215712Shsul@eecs.umich.edu    SERIALIZE_ENUM(_status);
1229157Sandreas.hansson@arm.com    regs.serialize(os);
1232SN/A    // thread_num and cpu_id are deterministic from the config
1245712Shsul@eecs.umich.edu    SERIALIZE_SCALAR(func_exe_inst);
1255712Shsul@eecs.umich.edu    SERIALIZE_SCALAR(inst);
1265712Shsul@eecs.umich.edu
1275712Shsul@eecs.umich.edu#if FULL_SYSTEM
1285712Shsul@eecs.umich.edu    kernelStats->serialize(os);
1292SN/A#endif
1302SN/A}
1312SN/A
1325712Shsul@eecs.umich.edu
1335712Shsul@eecs.umich.eduvoid
1346221Snate@binkert.orgExecContext::unserialize(Checkpoint *cp, const std::string &section)
1356221Snate@binkert.org{
1362SN/A    UNSERIALIZE_ENUM(_status);
1372SN/A    regs.unserialize(cp, section);
1386221Snate@binkert.org    // thread_num and cpu_id are deterministic from the config
1396221Snate@binkert.org    UNSERIALIZE_SCALAR(func_exe_inst);
1406221Snate@binkert.org    UNSERIALIZE_SCALAR(inst);
1416221Snate@binkert.org
1422SN/A#if FULL_SYSTEM
1432SN/A    kernelStats->unserialize(cp, section);
1442SN/A#endif
1452SN/A}
1465606Snate@binkert.org
1475606Snate@binkert.org
1486221Snate@binkert.orgvoid
1495606Snate@binkert.orgExecContext::activate(int delay)
1506221Snate@binkert.org{
1515606Snate@binkert.org    if (status() == Active)
1525606Snate@binkert.org        return;
1532SN/A
1541400SN/A    _status = Active;
1555606Snate@binkert.org    cpu->activateContext(thread_num, delay);
1565606Snate@binkert.org}
1572SN/A
1582SN/Avoid
1592SN/AExecContext::suspend()
1602SN/A{
1616221Snate@binkert.org    if (status() == Suspended)
1626221Snate@binkert.org        return;
1635606Snate@binkert.org
1646670Shsul@eecs.umich.edu#if FULL_SYSTEM
1655606Snate@binkert.org    // Don't change the status from active if there are pending interrupts
1662SN/A    if (cpu->check_interrupts()) {
1672SN/A        assert(status() == Active);
168124SN/A        return;
1696221Snate@binkert.org    }
1706221Snate@binkert.org#endif
1716221Snate@binkert.org
172124SN/A    _status = Suspended;
173124SN/A    cpu->suspendContext(thread_num);
174124SN/A}
175124SN/A
1765606Snate@binkert.orgvoid
1775606Snate@binkert.orgExecContext::deallocate()
1786221Snate@binkert.org{
1795606Snate@binkert.org    if (status() == Unallocated)
1806221Snate@binkert.org        return;
1815606Snate@binkert.org
1825606Snate@binkert.org    _status = Unallocated;
183124SN/A    cpu->deallocateContext(thread_num);
1841400SN/A}
1855606Snate@binkert.org
186124SN/Avoid
187124SN/AExecContext::halt()
188124SN/A{
189124SN/A    if (status() == Halted)
1906221Snate@binkert.org        return;
1916221Snate@binkert.org
1925606Snate@binkert.org    _status = Halted;
1936221Snate@binkert.org    cpu->haltContext(thread_num);
1945606Snate@binkert.org}
195124SN/A
196124SN/A
1971191SN/Avoid
1985529Snate@binkert.orgExecContext::regStats(const string &name)
1998634Schris.emmons@arm.com{
2008634Schris.emmons@arm.com#if FULL_SYSTEM
2018634Schris.emmons@arm.com    kernelStats->regStats(name + ".kern");
2028634Schris.emmons@arm.com#endif
2038634Schris.emmons@arm.com}
2041191SN/A
2055529Snate@binkert.orgvoid
2061191SN/AExecContext::trap(Fault fault)
2075529Snate@binkert.org{
2081191SN/A    //TheISA::trap(fault);    //One possible way to do it...
2091191SN/A
2105606Snate@binkert.org    /** @todo: Going to hack it for now.  Do a true fixup later. */
2115606Snate@binkert.org#if FULL_SYSTEM
2125606Snate@binkert.org    ev5_trap(fault);
2131191SN/A#else
2141191SN/A    fatal("fault (%d) detected @ PC 0x%08p", fault, readPC());
2158876Sandreas.hansson@arm.com#endif
2168876Sandreas.hansson@arm.com}
2178876Sandreas.hansson@arm.com