timing.hh revision 3846:a0fe3210ce53
1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Steve Reinhardt 29 */ 30 31#ifndef __CPU_SIMPLE_TIMING_HH__ 32#define __CPU_SIMPLE_TIMING_HH__ 33 34#include "cpu/simple/base.hh" 35 36class TimingSimpleCPU : public BaseSimpleCPU 37{ 38 public: 39 40 struct Params : public BaseSimpleCPU::Params { 41 }; 42 43 TimingSimpleCPU(Params *params); 44 virtual ~TimingSimpleCPU(); 45 46 virtual void init(); 47 48 public: 49 // 50 enum Status { 51 Idle, 52 Running, 53 IcacheRetry, 54 IcacheWaitResponse, 55 IcacheWaitSwitch, 56 DcacheRetry, 57 DcacheWaitResponse, 58 DcacheWaitSwitch, 59 SwitchedOut 60 }; 61 62 protected: 63 Status _status; 64 65 Status status() const { return _status; } 66 67 Event *drainEvent; 68 69 Event *fetchEvent; 70 71 private: 72 73 class CpuPort : public Port 74 { 75 protected: 76 TimingSimpleCPU *cpu; 77 Tick lat; 78 79 public: 80 81 CpuPort(const std::string &_name, TimingSimpleCPU *_cpu, Tick _lat) 82 : Port(_name, _cpu), cpu(_cpu), lat(_lat) 83 { } 84 85 bool snoopRangeSent; 86 87 protected: 88 89 virtual Tick recvAtomic(PacketPtr pkt); 90 91 virtual void recvFunctional(PacketPtr pkt); 92 93 virtual void recvStatusChange(Status status); 94 95 virtual void getDeviceAddressRanges(AddrRangeList &resp, 96 AddrRangeList &snoop) 97 { resp.clear(); snoop.clear(); snoop.push_back(RangeSize(0,0)); } 98 99 struct TickEvent : public Event 100 { 101 PacketPtr pkt; 102 TimingSimpleCPU *cpu; 103 104 TickEvent(TimingSimpleCPU *_cpu) 105 :Event(&mainEventQueue), cpu(_cpu) {} 106 const char *description() { return "Timing CPU clock event"; } 107 void schedule(PacketPtr _pkt, Tick t); 108 }; 109 110 }; 111 112 class IcachePort : public CpuPort 113 { 114 public: 115 116 IcachePort(TimingSimpleCPU *_cpu, Tick _lat) 117 : CpuPort(_cpu->name() + "-iport", _cpu, _lat), tickEvent(_cpu) 118 { } 119 120 protected: 121 122 virtual bool recvTiming(PacketPtr pkt); 123 124 virtual void recvRetry(); 125 126 struct ITickEvent : public TickEvent 127 { 128 129 ITickEvent(TimingSimpleCPU *_cpu) 130 : TickEvent(_cpu) {} 131 void process(); 132 const char *description() { return "Timing CPU clock event"; } 133 }; 134 135 ITickEvent tickEvent; 136 137 }; 138 139 class DcachePort : public CpuPort 140 { 141 public: 142 143 DcachePort(TimingSimpleCPU *_cpu, Tick _lat) 144 : CpuPort(_cpu->name() + "-dport", _cpu, _lat), tickEvent(_cpu) 145 { } 146 147 protected: 148 149 virtual bool recvTiming(PacketPtr pkt); 150 151 virtual void recvRetry(); 152 153 struct DTickEvent : public TickEvent 154 { 155 DTickEvent(TimingSimpleCPU *_cpu) 156 : TickEvent(_cpu) {} 157 void process(); 158 const char *description() { return "Timing CPU clock event"; } 159 }; 160 161 DTickEvent tickEvent; 162 163 }; 164 165 IcachePort icachePort; 166 DcachePort dcachePort; 167 168 PacketPtr ifetch_pkt; 169 PacketPtr dcache_pkt; 170 171 int cpu_id; 172 Tick previousTick; 173 174 public: 175 176 virtual Port *getPort(const std::string &if_name, int idx = -1); 177 178 virtual void serialize(std::ostream &os); 179 virtual void unserialize(Checkpoint *cp, const std::string §ion); 180 181 virtual unsigned int drain(Event *drain_event); 182 virtual void resume(); 183 184 void switchOut(); 185 void takeOverFrom(BaseCPU *oldCPU); 186 187 virtual void activateContext(int thread_num, int delay); 188 virtual void suspendContext(int thread_num); 189 190 template <class T> 191 Fault read(Addr addr, T &data, unsigned flags); 192 193 template <class T> 194 Fault write(T data, Addr addr, unsigned flags, uint64_t *res); 195 196 void fetch(); 197 void completeIfetch(PacketPtr ); 198 void completeDataAccess(PacketPtr ); 199 void advanceInst(Fault fault); 200 private: 201 void completeDrain(); 202}; 203 204#endif // __CPU_SIMPLE_TIMING_HH__ 205