timing.hh revision 2901
1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Steve Reinhardt 29 */ 30 31#ifndef __CPU_SIMPLE_TIMING_HH__ 32#define __CPU_SIMPLE_TIMING_HH__ 33 34#include "cpu/simple/base.hh" 35 36class TimingSimpleCPU : public BaseSimpleCPU 37{ 38 public: 39 40 struct Params : public BaseSimpleCPU::Params { 41 }; 42 43 TimingSimpleCPU(Params *params); 44 virtual ~TimingSimpleCPU(); 45 46 virtual void init(); 47 48 public: 49 // 50 enum Status { 51 Idle, 52 Running, 53 IcacheRetry, 54 IcacheWaitResponse, 55 IcacheWaitSwitch, 56 DcacheRetry, 57 DcacheWaitResponse, 58 DcacheWaitSwitch, 59 SwitchedOut 60 }; 61 62 protected: 63 Status _status; 64 65 Status status() const { return _status; } 66 67 Event *drainEvent; 68 69 Event *fetchEvent; 70 71 private: 72 73 class CpuPort : public Port 74 { 75 protected: 76 TimingSimpleCPU *cpu; 77 78 public: 79 80 CpuPort(const std::string &_name, TimingSimpleCPU *_cpu) 81 : Port(_name), cpu(_cpu) 82 { } 83 84 protected: 85 86 virtual Tick recvAtomic(Packet *pkt); 87 88 virtual void recvFunctional(Packet *pkt); 89 90 virtual void recvStatusChange(Status status); 91 92 virtual void getDeviceAddressRanges(AddrRangeList &resp, 93 AddrRangeList &snoop) 94 { resp.clear(); snoop.clear(); } 95 }; 96 97 class IcachePort : public CpuPort 98 { 99 public: 100 101 IcachePort(TimingSimpleCPU *_cpu) 102 : CpuPort(_cpu->name() + "-iport", _cpu) 103 { } 104 105 protected: 106 107 virtual bool recvTiming(Packet *pkt); 108 109 virtual void recvRetry(); 110 }; 111 112 class DcachePort : public CpuPort 113 { 114 public: 115 116 DcachePort(TimingSimpleCPU *_cpu) 117 : CpuPort(_cpu->name() + "-dport", _cpu) 118 { } 119 120 protected: 121 122 virtual bool recvTiming(Packet *pkt); 123 124 virtual void recvRetry(); 125 }; 126 127 IcachePort icachePort; 128 DcachePort dcachePort; 129 130 Packet *ifetch_pkt; 131 Packet *dcache_pkt; 132 133 public: 134 135 virtual Port *getPort(const std::string &if_name, int idx = -1); 136 137 virtual void serialize(std::ostream &os); 138 virtual void unserialize(Checkpoint *cp, const std::string §ion); 139 140 virtual unsigned int drain(Event *drain_event); 141 virtual void resume(); 142 143 void switchOut(); 144 void takeOverFrom(BaseCPU *oldCPU); 145 146 virtual void activateContext(int thread_num, int delay); 147 virtual void suspendContext(int thread_num); 148 149 template <class T> 150 Fault read(Addr addr, T &data, unsigned flags); 151 152 template <class T> 153 Fault write(T data, Addr addr, unsigned flags, uint64_t *res); 154 155 void fetch(); 156 void completeIfetch(Packet *); 157 void completeDataAccess(Packet *); 158 void advanceInst(Fault fault); 159 private: 160 void completeDrain(); 161}; 162 163#endif // __CPU_SIMPLE_TIMING_HH__ 164