noncaching.hh revision 13113 
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379143Ssteve.reinhardt@amd.com * Authors: Andreas Sandberg
389143Ssteve.reinhardt@amd.com */
395795Ssaidi@eecs.umich.edu
409143Ssteve.reinhardt@amd.com#ifndef __CPU_SIMPLE_NONCACHING_HH__
415795Ssaidi@eecs.umich.edu#define __CPU_SIMPLE_NONCACHING_HH__
425795Ssaidi@eecs.umich.edu
435795Ssaidi@eecs.umich.edu#include "cpu/simple/atomic.hh"
445795Ssaidi@eecs.umich.edu#include "params/NonCachingSimpleCPU.hh"
455795Ssaidi@eecs.umich.edu
465795Ssaidi@eecs.umich.edu/**
47 * The NonCachingSimpleCPU is an AtomicSimpleCPU using the
48 * 'atomic_noncaching' memory mode instead of just 'atomic'.
49 */
50class NonCachingSimpleCPU : public AtomicSimpleCPU
51{
52  public:
53    NonCachingSimpleCPU(NonCachingSimpleCPUParams *p);
54
55    void verifyMemoryMode() const override;
56
57  protected:
58    Tick sendPacket(MasterPort &port, const PacketPtr &pkt) override;
59};
60
61#endif // __CPU_SIMPLE_NONCACHING_HH__
62