noncaching.cc revision 13012
113012Sandreas.sandberg@arm.com/*
213012Sandreas.sandberg@arm.com * Copyright (c) 2012, 2018 ARM Limited
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413012Sandreas.sandberg@arm.com *
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713012Sandreas.sandberg@arm.com * property including but not limited to intellectual property relating
813012Sandreas.sandberg@arm.com * to a hardware implementation of the functionality of the software
913012Sandreas.sandberg@arm.com * licensed hereunder.  You may use the software subject to the license
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1713012Sandreas.sandberg@arm.com * notice, this list of conditions and the following disclaimer;
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1913012Sandreas.sandberg@arm.com * notice, this list of conditions and the following disclaimer in the
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2313012Sandreas.sandberg@arm.com * this software without specific prior written permission.
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2513012Sandreas.sandberg@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
2613012Sandreas.sandberg@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
2713012Sandreas.sandberg@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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3513012Sandreas.sandberg@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3613012Sandreas.sandberg@arm.com *
3713012Sandreas.sandberg@arm.com * Authors: Andreas Sandberg
3813012Sandreas.sandberg@arm.com */
3913012Sandreas.sandberg@arm.com
4013012Sandreas.sandberg@arm.com#include "cpu/simple/noncaching.hh"
4113012Sandreas.sandberg@arm.com
4213012Sandreas.sandberg@arm.comNonCachingSimpleCPU::NonCachingSimpleCPU(NonCachingSimpleCPUParams *p)
4313012Sandreas.sandberg@arm.com    : AtomicSimpleCPU(p)
4413012Sandreas.sandberg@arm.com{
4513012Sandreas.sandberg@arm.com}
4613012Sandreas.sandberg@arm.com
4713012Sandreas.sandberg@arm.comvoid
4813012Sandreas.sandberg@arm.comNonCachingSimpleCPU::verifyMemoryMode() const
4913012Sandreas.sandberg@arm.com{
5013012Sandreas.sandberg@arm.com    if (!(system->isAtomicMode() && system->bypassCaches())) {
5113012Sandreas.sandberg@arm.com        fatal("The direct CPU requires the memory system to be in the "
5213012Sandreas.sandberg@arm.com              "'atomic_noncaching' mode.\n");
5313012Sandreas.sandberg@arm.com    }
5413012Sandreas.sandberg@arm.com}
5513012Sandreas.sandberg@arm.com
5613012Sandreas.sandberg@arm.comTick
5713012Sandreas.sandberg@arm.comNonCachingSimpleCPU::sendPacket(MasterPort &port, const PacketPtr &pkt)
5813012Sandreas.sandberg@arm.com{
5913012Sandreas.sandberg@arm.com    if (system->isMemAddr(pkt->getAddr())) {
6013012Sandreas.sandberg@arm.com        system->getPhysMem().access(pkt);
6113012Sandreas.sandberg@arm.com        return 0;
6213012Sandreas.sandberg@arm.com    } else {
6313012Sandreas.sandberg@arm.com        return port.sendAtomic(pkt);
6413012Sandreas.sandberg@arm.com    }
6513012Sandreas.sandberg@arm.com}
6613012Sandreas.sandberg@arm.com
6713012Sandreas.sandberg@arm.comNonCachingSimpleCPU *
6813012Sandreas.sandberg@arm.comNonCachingSimpleCPUParams::create()
6913012Sandreas.sandberg@arm.com{
7013012Sandreas.sandberg@arm.com    numThreads = 1;
7113012Sandreas.sandberg@arm.com    if (!FullSystem && workload.size() != 1)
7213012Sandreas.sandberg@arm.com        fatal("only one workload allowed");
7313012Sandreas.sandberg@arm.com    return new NonCachingSimpleCPU(this);
7413012Sandreas.sandberg@arm.com}
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