113012Sandreas.sandberg@arm.com/* 213012Sandreas.sandberg@arm.com * Copyright (c) 2012, 2018 ARM Limited 313012Sandreas.sandberg@arm.com * All rights reserved. 413012Sandreas.sandberg@arm.com * 513012Sandreas.sandberg@arm.com * The license below extends only to copyright in the software and shall 613012Sandreas.sandberg@arm.com * not be construed as granting a license to any other intellectual 713012Sandreas.sandberg@arm.com * property including but not limited to intellectual property relating 813012Sandreas.sandberg@arm.com * to a hardware implementation of the functionality of the software 913012Sandreas.sandberg@arm.com * licensed hereunder. You may use the software subject to the license 1013012Sandreas.sandberg@arm.com * terms below provided that you ensure that this notice is replicated 1113012Sandreas.sandberg@arm.com * unmodified and in its entirety in all distributions of the software, 1213012Sandreas.sandberg@arm.com * modified or unmodified, in source code or in binary form. 1313012Sandreas.sandberg@arm.com * 1413012Sandreas.sandberg@arm.com * Redistribution and use in source and binary forms, with or without 1513012Sandreas.sandberg@arm.com * modification, are permitted provided that the following conditions are 1613012Sandreas.sandberg@arm.com * met: redistributions of source code must retain the above copyright 1713012Sandreas.sandberg@arm.com * notice, this list of conditions and the following disclaimer; 1813012Sandreas.sandberg@arm.com * redistributions in binary form must reproduce the above copyright 1913012Sandreas.sandberg@arm.com * notice, this list of conditions and the following disclaimer in the 2013012Sandreas.sandberg@arm.com * documentation and/or other materials provided with the distribution; 2113012Sandreas.sandberg@arm.com * neither the name of the copyright holders nor the names of its 2213012Sandreas.sandberg@arm.com * contributors may be used to endorse or promote products derived from 2313012Sandreas.sandberg@arm.com * this software without specific prior written permission. 2413012Sandreas.sandberg@arm.com * 2513012Sandreas.sandberg@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2613012Sandreas.sandberg@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2713012Sandreas.sandberg@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2813012Sandreas.sandberg@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2913012Sandreas.sandberg@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3013012Sandreas.sandberg@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3113012Sandreas.sandberg@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3213012Sandreas.sandberg@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3313012Sandreas.sandberg@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3413012Sandreas.sandberg@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3513012Sandreas.sandberg@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3613012Sandreas.sandberg@arm.com * 3713012Sandreas.sandberg@arm.com * Authors: Andreas Sandberg 3813012Sandreas.sandberg@arm.com */ 3913012Sandreas.sandberg@arm.com 4013012Sandreas.sandberg@arm.com#include "cpu/simple/noncaching.hh" 4113012Sandreas.sandberg@arm.com 4213012Sandreas.sandberg@arm.comNonCachingSimpleCPU::NonCachingSimpleCPU(NonCachingSimpleCPUParams *p) 4313012Sandreas.sandberg@arm.com : AtomicSimpleCPU(p) 4413012Sandreas.sandberg@arm.com{ 4513012Sandreas.sandberg@arm.com} 4613012Sandreas.sandberg@arm.com 4713012Sandreas.sandberg@arm.comvoid 4813012Sandreas.sandberg@arm.comNonCachingSimpleCPU::verifyMemoryMode() const 4913012Sandreas.sandberg@arm.com{ 5013012Sandreas.sandberg@arm.com if (!(system->isAtomicMode() && system->bypassCaches())) { 5113012Sandreas.sandberg@arm.com fatal("The direct CPU requires the memory system to be in the " 5213012Sandreas.sandberg@arm.com "'atomic_noncaching' mode.\n"); 5313012Sandreas.sandberg@arm.com } 5413012Sandreas.sandberg@arm.com} 5513012Sandreas.sandberg@arm.com 5613012Sandreas.sandberg@arm.comTick 5713012Sandreas.sandberg@arm.comNonCachingSimpleCPU::sendPacket(MasterPort &port, const PacketPtr &pkt) 5813012Sandreas.sandberg@arm.com{ 5913012Sandreas.sandberg@arm.com if (system->isMemAddr(pkt->getAddr())) { 6013012Sandreas.sandberg@arm.com system->getPhysMem().access(pkt); 6113012Sandreas.sandberg@arm.com return 0; 6213012Sandreas.sandberg@arm.com } else { 6313012Sandreas.sandberg@arm.com return port.sendAtomic(pkt); 6413012Sandreas.sandberg@arm.com } 6513012Sandreas.sandberg@arm.com} 6613012Sandreas.sandberg@arm.com 6713012Sandreas.sandberg@arm.comNonCachingSimpleCPU * 6813012Sandreas.sandberg@arm.comNonCachingSimpleCPUParams::create() 6913012Sandreas.sandberg@arm.com{ 7013012Sandreas.sandberg@arm.com numThreads = 1; 7113012Sandreas.sandberg@arm.com if (!FullSystem && workload.size() != 1) 7213012Sandreas.sandberg@arm.com fatal("only one workload allowed"); 7313012Sandreas.sandberg@arm.com return new NonCachingSimpleCPU(this); 7413012Sandreas.sandberg@arm.com} 75